ICS854054

Integrated Circuit Systems, Inc. ICS854054 4:1 DIFFERENTIAL-TO-LVDS CLOCK MULTIPLEXER FEATURES High speed 4:1 differential multiplexer One differential LVDS output Four selectable differential clock inputs PCLKx, nPCLKx pairs can accept the following differential input levels: LVPECL, LVDS, CML, SSTL Maximum output frequency: 2.8GHz Translates any single ended input signal to LVDS levels with resistor bias on nPCLKx input Part-to-part skew: 375ps (maximum) Propagation delay: 700ps (maximum) Supply voltage range: 3.135V to 3.465V -40°C to 85°C ambient operating temperature Available in both standard and lead-free RoHS compliant packages GENERAL DESCRIPTION The ICS854054 is a 4:1 Differential-to-LVDS Clock Multiplexer which can operate up to 2.8GHz and HiPerClockS™ is a member of the HiPerClockS™ family of High Performance Clock Solutions from ICS. The ICS854054 has 4 selectable differential clock inputs. The PCLK, nPCLK input pairs can accept LVPECL, LVDS, CML or SSTL levels. The fully differential architecture and low propagation delay make it ideal for use in clock distribution circuits. The select pins have internal pulldown resistors. The SEL1 pin is the most significant bit and the binary number applied to the select pins will select the same www.DataSheet4U.com numbered data input (i.e., 00 selects PCLK0, nPCLK0). IC S BLOCK DIAGRAM PCLK0 nPCLK0 PCLK1 nPCLK1 PCLK2 nPCLK2 PCLK3 nPCLK3 PIN ASSIGNMENT PCLK0 nPCLK0 PCLK1 nPCLK1 VDD SEL0 SEL1 GND 1 ...