HYB18T256161BF-25

June 2007 www.DataSheet4U.com HYB18T256161BF–20/25/28 256-Mbit x16 DDR2 SDRAM DDR2 SDRAM RoHS compliant Internet Data Sheet Rev. 1.20 Internet Data Sheet www.DataSheet4U.com HYB18T256161BF–20/25/28 256-Mbit Double-Data-Rate-Two SDRAM HYB18T256161BF–20/25/28 Revision History: 2007-06, Rev. 1.20 Page All All 94-101 82-86 All Subjects (major changes since last revision) Typos corrected Final Data Sheet added chapter 7 explaining AC timing measurement condition (reference load ; slew rate ; set up & hold timing references ; derating values for input /command ,data ) setup & hold timings are changed with reference to Industrial standard definition removed all the occurances of RDQS as it in not used in graphics (x16) Previous Revision: Rev. 1.0, 2006-09 Previous Revision: Rev. 0.60, 2006-09 We Listen to Your Comments Any information within this document that you feel is wrong, unclear or missing at all? Your feedback will help us to continuously improve the quality of this document. Please send your proposal (including a reference to this document) to: [email protected] qag_techdoc_rev400 / 3.2 QAG / 2006-08-01 11232006-QP6X-6EM0 2 Internet Data Sheet www.DataSheet4U.com HYB18T256161BF–20/25/28 256-Mbit Double-Data-Rate-Two SDRAM 1 Overview This chapter gives an overview of the 256-Mbit Double-Data-Rate-Two SDRAM product family for graphics applications and describes its main characteristics. 1.1 Features The 256-Mbit Double-Data-Rate-Two SDRAM offers the follo...