PDTB114ET

DISCRETE SEMICONDUCTORS www.DataSheet4U.com DATA SHEET ook, halfpage M3D088 PDTB114ET PNP resistor-equipped transistor Objective specification Supersedes data of February 1995 File under Discrete Semiconductors, SC04 1997 Sep 02 Philips Semiconductors www.DataSheet4U.com Objective specification PNP resistor-equipped transistor FEATURES Built-in bias resistors R1 and R2 (typ. 10 kΩ each) Simplification of circuit design Reduces number of components and board space. APPLICATIONS Especially suitable for space reduction in interface and driver circuits Inverter circuit configurations without use of external resistors. handbook, 4 columns PDTB114ET 3 3 R1 1 R2 2 1 2 MAM100 Top view Fig.1 Simplified outline (SOT23) and symbol. DESCRIPTION PNP resistor-equipped transistor in a SOT23 plastic package. NPN complement: PDTD114ET. 1 3 2 MARKING TYPE NUMBER PDTB114ET MARKING CODE p09 PINNING PIN 1 2 3 DESCRIPTION base/input emitter/ground (+) collector/output MGA893 - 1 Fig.2 Equivalent inverter symbol. QUICK REFERENCE DATA SYMBOL VCEO IO ICM Ptot hFE R1 R2 ------R1 PARAMETER collector-emitter voltage output current (DC) peak collector current total power dissipation DC current gain input resistor resistor ratio Tamb ≤ 25 °C IC = −50 mA; VCE = −5 V CONDITIONS open base − − − − 56 7 0.8 MIN. − − − − − 10 1 TYP. MAX. −50 −500 −500 250 − 13 1.2 kΩ UNIT V mA mA mW 1997 Sep 02 2 Philips Semiconductors www.DataSheet4U.com Objective specification PNP resistor-equipped...