RD74LVC125B

www.DataSheet4U.com RD74LVC125B Quad. Bus Buffer Gates with 3-state Outputs REJ03D0498–0200 Rev.2.00 Dec. 10, 2004 Description The RD74LVC125B has four bus buffer gates in a 14 pin package. The device requires the three state control input OE to be taken high to put the output into the high impedance condition. Low voltage and high-speed operation is suitable at the battery drive product (note type personal computer) and low power consumption extends the life of a battery for long time operation. Features VCC = 1.65 V to 5.5 V All inputs VIH (Max.) = 5.5 V (@VCC = 0 V to 5.5 V) All outputs VOUT (Max.) = 5.5 V (@VCC = 0 V or output off state) Typical VOL ground bounce < 0.8 V (@VCC = 3.3 V, Ta = 25°C) Typical VOH undershoot > 2.0 V (@VCC = 3.3 V, Ta = 25°C) High output current ±4 mA (@VCC = 1.65 V) ±8 mA (@VCC = 2.3 V) ±12 mA (@VCC = 2.7 V) ±24 mA (@VCC = 3.0 V to 5.5 V) Ordering Information Part Name RD74LVC125BFPEL RD74LVC125BTELL Package Type SOP–14 pin (JEITA) TSSOP–14 pin Package Code FP–14DAV TTP–14DV FP T Package Abbreviation Taping Abbreviation (Quantity) EL (2,000 pcs/reel) ELL (2,000 pcs/reel) Function Table Inputs OE H L L H: L: X: Z: High level Low level Immaterial High impedance X L H A Z L H Outputs Y Rev.2.00 Dec. 10, 2004 page 1 of 8 RD74LVC125B Pin Arrangement www.DataSheet4U.com 1OE 1 1A 1Y 2 3 14 V CC 13 4OE 12 4A 11 4Y 10 3OE 9 3A 8 3Y 2OE 4 2A 2Y GND 5 6 7 (Top view) Absolute Maximum Ratings Item Supply voltage Input diode curre...