Dual D-Type Flip-Flop
TC74HC74AP/AF/AFN
TOSHIBA CMOS Digital Integrated Circuit Silicon Monolithic
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TC74HC74AP,TC74HC74AF,...
Description
TC74HC74AP/AF/AFN
TOSHIBA CMOS Digital Integrated Circuit Silicon Monolithic
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TC74HC74AP,TC74HC74AF,TC74HC74AFN
Dual D-Type Flip Flop Preset and Clear
The TC74HC74A is a high speed CMOS D FLIP FLOP fabricated with silicon gate C2MOS technology. It achieves the high speed operation similar to equivalent LSTTL while maintaining the CMOS low power dissipation. The signal level applied to the D INPUT is transferred to Q OUTPUT during the positive going transition of the CLOCK pulse. CLEAR and PRESET are independent of the CLOCK and are accomplished by setting the appropriate input to an “L” level. All inputs are equipped with protection circuits against static discharge or transient excess voltage.
Note: xxxFN (JEDEC SOP) is not available in Japan. TC74HC74AP
TC74HC74AF
Features
High speed: fmax = 77 MHz (typ.) at VCC = 5 V Low power dissipation: ICC = 2 μA (max) at Ta = 25°C High noise immunity: VNIH = VNIL = 28% VCC (min) Output drive capability: 10 LSTTL loads Symmetrical output impedance: |IOH| = IOL = 4 mA (min) ∼ tpHL Balanced propagation delays: tpLH − Wide operating voltage range: VCC (opr) = 2~6 V Pin and function compatible with 74LS74
TC74HC74AFN
Pin Assignment
Weight DIP14-P-300-2.54 SOP14-P-300-1.27A SOL14-P-150-1.27
: 0.96 g (typ.) : 0.18 g (typ.) : 0.12 g (typ.)
1
2007-10-01
TC74HC74AP/AF/AFN
IEC Logic Symbol
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Truth Table
Inputs
CLR
Outputs
PR H L L H H H
D X X X L H X
CK X X X
Q L H H L H Qn
Q
...
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