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PHX8NQ11T
N-channel TrenchMOS™ standard level FET
Rev. 01 — 14 May 2004 Product data
1. Product profile
1.1 Description
N-channel enhancement mode field-effect transistor in a fully isolated encapsulated plastic package using TrenchMOS™ technology.
1.2 Features
s Low on-state resistance s Isolated package.
1.3 Applications
s DC-to-DC converters s Switched-mode power supplies.
1.4 Quick reference data
s VDS ≤ 110 V s Ptot ≤ 27.7 W s ID ≤ 7.5 A s RDSon ≤ 180 mΩ.
2. Pinning information
Table 1: Pin 1 2 3 mb Pinning - SOT186A (TO-220F) simplified outline and symbol Description gate (g) drain (d) source (s) mounting base; isolated
g
mbb076
Simplified outline
mb
Symbol
d
s
1 2 3
MBK110
SOT186A (TO-220F)
Philips Semiconductors
PHX8NQ11T
N-channel TrenchMOS™ standard level FET
w w w . D a t a S h e e t 4 U . c
3. Ordering information
Table 2: Ordering information Package Name PHX8NQ11T TO-220F Description Version Plastic single-ended package; isolated heatsink mounted; 1 mounting hole; SOT186A 3 lead TO-220 ‘full pack’ Type number
4. Limiting values
Table 3: Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Symbol Parameter VDS VDGR VGS ID IDM Ptot Tstg Tj IS ISM drain-source voltage (DC) drain-gate voltage (DC) gate-source voltage (DC) drain current (DC) peak drain current total power dissipation storage temperature junction temperature source (diode forward) current (DC) Th = 25 °C peak source (diode forward) current Th = 25 °C; pulsed; tp ≤ 10 µs unclamped inductive load; ID = 4.5 A; tp = 0.1 ms; VDD ≤ 100 V; RGS = 50 Ω; VGS = 10 V; starting at Tj = 25 °C Th = 25 °C; VGS = 10 V; Figure 2 and 3 Th = 100 °C; VGS = 10 V; Figure 2 Th = 25 °C; pulsed; tp ≤ 10 µs; Figure 3 Th = 25 °C; Figure 1 Conditions 25 °C ≤ Tj ≤ 150 °C 25 °C ≤ Tj ≤ 150 °C; RGS = 20 kΩ Min −55 −55 Max 110 110 ±20 7.5 4.7 30.2 27.7 +150 +150 7.5 30.2 35 Unit V V V A A A W °C °C A A mJ
Source-drain diode
Avalanche ruggedness EDS(AL)S non-repetitive drain-source avalanche energy
9397 750 13285
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.
Product data
Rev. 01 — 14 May 2004
2 of 12
Philips Semiconductors
PHX8NQ11T
www.DataSheet4U.com
N-channel TrenchMOS™ standard level FET
120 Pder (%) 80
03aa13
120 Ider (%) 80
03aa21
40
40
0 0 50 100 150 Th (°C) 200
0 0 50 100 150 Th (°C) 200
P tot P der = ---------------------- × 100 % P °
tot ( 25 C )
ID I der = ------------------- × 100 % I °
D ( 25 C )
Fig 1. Normalized total power dissipation as a function of heatsink temperature.
Fig 2. Normalized continuous drain current as a function of heatsink temperature.
102 ID (A) Limit RDSon = VDS / ID tp = 10 µ s
03aq71
10 100 µ s
DC 1
1 ms
10 ms
10-1 1 10 102 VDS (V) 103
Th = 25 °C; IDM is single pulse; VGS = 10 V.
Fig 3. Safe operating area; continuous and peak drain currents as a function of drain-source voltage.
9397 750 13285
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.
Product data
Rev. 01 — 14 May 2004
3 of 12
Philips Semiconductors
PHX8NQ11T
www.DataSheet4U.com
N-channel TrenchMOS™ standard level FET
5. Thermal characteristics
Table 4: Rth(j-h) Thermal characteristics Conditions Figure 4 Min Typ Max 4.5 Unit K/W thermal resistance from junction to heatsink Symbol Parameter
5.1 Transient thermal impedance
10 Zth(j-h) (K/W) δ = 0.5 0.2 0.1 0.05 0.02 10-1 single pulse P
03aq70
1
δ=
tp T
tp T 10-2 10-5 10-4 10-3 10-2 10-1 1 10 tp (s)
t
102
Fig 4. Transient thermal impedance from junction to heatsink as a function of pulse duration.
9397 750 13285
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.
Product data
Rev. 01 — 14 May 2004
4 of 12
Philips Semiconductors
PHX8NQ11T
www.DataSheet4U.com
N-channel TrenchMOS™ standard level FET
6. Characteristics
Table 5: Characteristics Tj = 25 °C unless otherwise specified. Symbol Parameter Static characteristics V(BR)DSS drain-source breakdown voltage ID = 250 µA; VGS = 0 V Tj = 25 °C Tj = −55 °C VGS(th) gate-source threshold voltage ID = 1 mA; VDS = VGS; Figure 9 and 10 Tj = 25 °C Tj = 150 °C Tj = −55 °C IDSS drain-source leakage current VDS = 100 V; VGS = 0 V Tj = 25 °C Tj = 150 °C IGSS RDSon gate-source leakage current drain-source on-state resistance VGS = ±10 V; VDS = 0 V VGS = 10 V; ID = 6 A; Figure 7 and 8 Tj = 25 °C Tj = 150 °C Dynamic characteristics Qg(tot) Qgs Qgd Ciss Coss Crss td(on) tr td(off) tf VSD trr Qr total gate charge gate-source charge gate-drain (Miller) charge input capacitance output capacitance reverse transfer capacitance turn-on delay time rise time turn-off delay time fall time source-drain (diode forward) voltage IS = 5.5 A; VGS = 0 V; Figure 12 reverse recovery time recovered charge IS = 5.5 A; dIS/dt = −100 A/µs; VGS = 0 V VDD = 50 V; RG = 4.7 Ω; VGS = 10 V; RG = 5.6 Ω VGS = 0 V; VDS = 25 V; f = 1 MHz; Figure 11 ID = 11 A; VDD = 80 V; VGS = 10 V; Figure 13 14.7 2.3 5.3 360 60 40 5.5 23 11.5 7.2 1 55 85 1.5 nC nC nC pF .