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PHB45NQ15T Dataheets PDF



Part Number PHB45NQ15T
Manufacturers NXP Semiconductors
Logo NXP Semiconductors
Description N-channel TrenchMOS standard level FET
Datasheet PHB45NQ15T DatasheetPHB45NQ15T Datasheet (PDF)

PHP/PHB45NQ15T N-channel TrenchMOS™ standard level FET Rev. 01 — 8 November 2004 www.DataSheet4U.com Product data sheet 1. Product profile 1.1 General description Standard level N-channel enhancement mode field effect transistor in a plastic package using TrenchMOS™ technology. 1.2 Features s Low on-state resistance s Low thermal resistance s Fast switching s Low gate charge. 1.3 Applications s DC-to-DC primary side switching s AC-to-DC secondary side rectification. 1.4 Quick reference data s.

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PHP/PHB45NQ15T N-channel TrenchMOS™ standard level FET Rev. 01 — 8 November 2004 www.DataSheet4U.com Product data sheet 1. Product profile 1.1 General description Standard level N-channel enhancement mode field effect transistor in a plastic package using TrenchMOS™ technology. 1.2 Features s Low on-state resistance s Low thermal resistance s Fast switching s Low gate charge. 1.3 Applications s DC-to-DC primary side switching s AC-to-DC secondary side rectification. 1.4 Quick reference data s VDS ≤ 150 V s RDSon ≤ 42 mΩ s ID ≤ 45.1 A s Qgd = 10.3 nC (typ). 2. Pinning information Table 1: 1 2 3 mb gate drain source mounting base; connected to drain [1] Discrete pinning Simplified outline mb mb Pin Description Symbol D G mbb076 S 2 1 1 2 3 3 SOT78 (TO-220AB) [1] It is not possible to make a connection to pin 2 of the SOT404 package. SOT404 (D2-PAK) Philips Semiconductors PHP/PHB45NQ15T www.DataSheet4U.com N-channel TrenchMOS™ standard level FET 3. Ordering information Table 2: Ordering information Package Name PHP45NQ15T PHB45NQ15T TO-220AB D2-PAK Description Plastic single-ended package; heatsink mounted; 1 mounting hole; 3 lead TO-220AB Version SOT78 Type number Plastic single-ended surface mounted package (D2-PAK); 3 leads (one lead SOT404 cropped) 4. Limiting values Table 3: Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Symbol Parameter VDS VDGR VGS ID IDM Ptot Tstg Tj IS ISM drain-source voltage (DC) drain-gate voltage (DC) gate-source voltage (DC) drain current (DC) peak drain current total power dissipation storage temperature junction temperature source (diode forward) current (DC) Tmb = 25 °C peak source (diode forward) current Tmb = 25 °C; pulsed; tp ≤ 10 µs unclamped inductive load; ID = 19.1 A; tp = 0.1 ms; VDD ≤ 150 V; RGS = 50 Ω; VGS = 10 V; starting at Tj = 25 °C Tmb = 25 °C; VGS = 10 V; Figure 2 and 3 Tmb = 100 °C; VGS = 10 V; Figure 2 Tmb = 25 °C; pulsed; tp ≤ 10 µs; Figure 3 Tmb = 25 °C; Figure 1 Conditions 25 °C ≤ Tj ≤ 175 °C 25 °C ≤ Tj ≤ 175 °C; RGS = 20 kΩ Min −55 −55 Max 150 150 ±20 45.1 31.9 90.2 230 +175 +175 45.1 90.2 180 Unit V V V A A A W °C °C A A mJ Source-drain diode Avalanche ruggedness EDS(AL)S non-repetitive drain-source avalanche energy 9397 750 14012 © Koninklijke Philips Electronics N.V. 2004. All rights reserved. Product data sheet Rev. 01 — 8 November 2004 2 of 13 Philips Semiconductors PHP/PHB45NQ15T www.DataSheet4U.com N-channel TrenchMOS™ standard level FET 120 Pder (%) 80 03aa16 120 Ider (%) 80 03aa24 40 40 0 0 50 100 150 Tmb (°C) 200 0 0 50 100 150 200 Tmb (°C) P tot P der = ---------------------- × 100 % P ° tot ( 25 C ) ID I der = ------------------- × 100 % I ° D ( 25 C ) Fig 1. Normalized total power dissipation as a function of mounting base temperature. 102 Fig 2. Normalized continuous drain current as a function of mounting base temperature. 03ao18 tp = 10 µ s ID (A) Limit RDSon = VDS / ID 100 µ s 10 DC 1 ms 10 ms 1 1 10 102 VDS (V) 103 Tmb = 25 °C; IDM is single pulse; VGS = 10 V Fig 3. Safe operating area; continuous and peak drain currents as a function of drain-source voltage. 9397 750 14012 © Koninklijke Philips Electronics N.V. 2004. All rights reserved. Product data sheet Rev. 01 — 8 November 2004 3 of 13 Philips Semiconductors PHP/PHB45NQ15T www.DataSheet4U.com N-channel TrenchMOS™ standard level FET 5. Thermal characteristics Table 4: Rth(j-mb) Rth(j-a) Thermal characteristics Conditions Min Typ 60 50 Max 0.65 Unit K/W K/W K/W thermal resistance from junction to mounting base Figure 4 thermal resistance from junction to ambient SOT78 SOT404 vertical in free air mounted on a printed-circuit board; minimum footprint; vertical in still air Symbol Parameter 5.1 Transient thermal impedance 03ao17 10 Zth(j-mb) (K/W) 1 δ = 0.5 10-1 0.2 0.1 0.05 0.02 10-2 single pulse tp T P δ= tp T t 10-3 10-5 10-4 10-3 10-2 10-1 tp (s) 1 Fig 4. Transient thermal impedance from junction to mounting base as a function of pulse duration. 9397 750 14012 © Koninklijke Philips Electronics N.V. 2004. All rights reserved. Product data sheet Rev. 01 — 8 November 2004 4 of 13 Philips Semiconductors PHP/PHB45NQ15T www.DataSheet4U.com N-channel TrenchMOS™ standard level FET 6. Characteristics Table 5: Characteristics Tj = 25 °C unless otherwise specified. Symbol Parameter Static characteristics V(BR)DSS drain-source breakdown voltage ID = 250 µA; VGS = 0 V Tj = 25 °C Tj = −55 °C VGS(th) gate-source threshold voltage ID = 1 mA; VDS = VGS; Figure 9 and 10 Tj = 25 °C Tj = 175 °C Tj = −55 °C IDSS drain-source leakage current VDS = 120 V; VGS = 0 V Tj = 25 °C Tj = 175 °C IGSS RDSon gate-source leakage current drain-source on-state resistance VGS = ±20 V; VDS = 0 V VGS = 10 V; ID = 20 A; Figure 6 and 8 Tj = 25 °C Tj = 175 °C Dynamic characteristics Qg(tot) Qgs Qgd Ciss Coss Crss td(on) tr td(off) tf VSD trr Qr total gate charge gate-source charge gate-drain (Miller) charge i.


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