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K4S56163LF-XG Dataheets PDF



Part Number K4S56163LF-XG
Manufacturers Samsung semiconductor
Logo Samsung semiconductor
Description 4M x 16Bit x 4 Banks Mobile SDRAM
Datasheet K4S56163LF-XG DatasheetK4S56163LF-XG Datasheet (PDF)

K4S56163LF - X(Z)E/N/G/C/L/F 4M x 16Bit x 4 Banks Mobile SDRAM in 54BOC FEATURES • 2.5V power supply. • LVCMOS compatible with multiplexed address. • Four banks operation. • MRS cycle with address key programs. -. CAS latency (1, 2 & 3). -. Burst length (1, 2, 4, 8 & Full page). -. Burst type (Sequential & Interleave). • EMRS cycle with address key programs. • All inputs are sampled at the positive going edge of the system clock. • Burst read single-bit write operation. • Special Function Suppor.

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K4S56163LF - X(Z)E/N/G/C/L/F 4M x 16Bit x 4 Banks Mobile SDRAM in 54BOC FEATURES • 2.5V power supply. • LVCMOS compatible with multiplexed address. • Four banks operation. • MRS cycle with address key programs. -. CAS latency (1, 2 & 3). -. Burst length (1, 2, 4, 8 & Full page). -. Burst type (Sequential & Interleave). • EMRS cycle with address key programs. • All inputs are sampled at the positive going edge of the system clock. • Burst read single-bit write operation. • Special Function Support. -. PASR (Partial Array Self Refresh). -. Internal TCSR (Temperature Compensated Self Refresh) • DQM for masking. • Auto refresh. • • • • 64ms refresh period (8K cycle). Commercial Temperature Operation (-25°C ~ 70°C). Extended Temperature Operation (-25°C ~ 85°C). 54Balls BOC with 0.8mm ball pitch ( -X : Leaded, -Z : Lead Free). Mobile-SDRAM www.DataSheet4U.com GENERAL DESCRIPTION The K4S56163LF is 268,435,456 bits synchronous high data rate Dynamic RAM organized as 4 x 4,196,304 words by 16 bits, fabricated with SAMSUNG's high performance CMOS technology. Synchronous design allows precise cycle control with the use of system clock and I/O transactions are possible on every clock cycle. Range of operating frequencies, programmable burst length and programmable latencies allow the same device to be useful for a variety of high bandwidth, high performance memory system applications. ORDERING INFORMATION Part No. K4S56163LF-X(Z)E/N/G/C/L/F75 K4S56163LF-X(Z)E/N/G/C/L/F1H K4S56163LF-X(Z)E/N/G/C/L/F1L Max Freq. 133MHz(CL=3) 105MHz(CL=2) 105MHz(CL=3)*1 LVCMOS 54 BOC Leaded (Lead Free) Interface Package - X(Z)E/N/G : Normal / Low / Low Power, Extended Temperature(-25°C ~ 85°C) - X(Z)C/L/F : Normal / Low / Low Power, Commercial Temperature(-25°C ~ 70°C) NOTES : 1. In case of 40MHz Frequency, CL1 can be supported. 2. Samsung are not designed or manufactured for use in a device or system that is used under circumstance in which human life is potentially at stake. Please contact to the memory marketing team in samsung electronics when considering the use of a product contained herein for any specific purpose, such as medical, aerospace, nuclear, military, vehicular or undersea repeater use. February 2004 K4S56163LF - X(Z)E/N/G/C/L/F FUNCTIONAL BLOCK DIAGRAM Mobile-SDRAM www.DataSheet4U.com I/O Control LWE Data Input Register Bank Select LDQM 4M x 16 Sense AMP 4M x 16 4M x 16 4M x 16 Refresh Counter Output Buffer Row Decoder Row Buffer DQi Address Register LRAS CLK CKE CLK ADD Column Decoder Col. Buffer LRAS LCBR Latency & Burst Length LCKE LCBR LWE LCAS Programming Register LWCBR LDQM Timing Register CS RAS CAS WE L(U)DQM February 2004 K4S56163LF - X(Z)E/N/G/C/L/F Package Dimension and Pin Configuration < Bottom View*1 > E1 Mobile-SDRAM www.DataSheet4U.com < Top View*2 > 9 A 8 7 3 2 1 1 e A B C D D E F D/2 G H J VSS DQ14 DQ12 DQ10 DQ8 UDQM A12 A8 VSS 2 54Ball(6x9) BOC 3 VSSQ VDDQ VSSQ VDDQ VSS CKE A9 A6 A4 7 VDDQ VSSQ VDDQ VSSQ V.


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