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K4S643233H-FHG Dataheets PDF



Part Number K4S643233H-FHG
Manufacturers Samsung semiconductor
Logo Samsung semiconductor
Description Mobile-SDRAM
Datasheet K4S643233H-FHG DatasheetK4S643233H-FHG Datasheet (PDF)

K4S643233H - F(H)E/N/G/C/L/F 512K x 32Bit x 4 Banks Mobile SDRAM in 90FBGA FEATURES • 3.0V & 3.3V power supply. • LVCMOS compatible with multiplexed address. • Four banks operation. • MRS cycle with address key programs. -. CAS latency (1, 2 & 3). -. Burst length (1, 2, 4, 8 & Full page). -. Burst type (Sequential & Interleave). • EMRS cycle with address key programs. • All inputs are sampled at the positive going edge of the system clock. • Burst read single-bit write operation. • Special Funct.

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K4S643233H - F(H)E/N/G/C/L/F 512K x 32Bit x 4 Banks Mobile SDRAM in 90FBGA FEATURES • 3.0V & 3.3V power supply. • LVCMOS compatible with multiplexed address. • Four banks operation. • MRS cycle with address key programs. -. CAS latency (1, 2 & 3). -. Burst length (1, 2, 4, 8 & Full page). -. Burst type (Sequential & Interleave). • EMRS cycle with address key programs. • All inputs are sampled at the positive going edge of the system clock. • Burst read single-bit write operation. • Special Function Support. -. PASR (Partial Array Self Refresh). -. Internal TCSR (Temperature Compensated Self Refresh) • DQM for masking. • Auto refresh. • • • • 64ms refresh period (4K cycle). Commercial Temperature Operation (-25°C ~ 70°C). Extended Temperature Operation (-25°C ~ 85°C). 90Balls FBGA with 0.8mm ball pitch ( -FXXX : Leaded, -HXXX : Lead Free). Mobile-SDRAM www.DataSheet4U.com GENERAL DESCRIPTION The K4S643233H is 67,108,864 bits synchronous high data rate Dynamic RAM organized as 4 x 524,288 words by 32 bits, fabricated with SAMSUNG’s high performance CMOS technology. Synchronous design allows precise cycle control with the use of system clock and I/O transactions are possible on every clock cycle. Range of operating frequencies, programmable burst lengths and programmable latencies allow the same device to be useful for a variety of high bandwidth and high performance memory system applications. ORDERING INFORMATION Part No. K4S643233H-F(H)E/N/G/C/L/F60 K4S643233H-F(H)E/N/G/C/L/F75 K4S643233H-F(H)E/N/G/C/L/F1H K4S643233H-F(H)E/N/G/C/L/F1L Max Freq. 166MHz(CL=3) 133MHz(CL=3) 105MHz(CL=2) 105MHz(CL=3)*1 LVCMOS 90 FBGA Leaded (Lead Free) Interface Package - F(H)E/N/G : Normal / Low / Low Power, Extended Temperature(-25°C ~ 85°C) - F(H)C/L/F : Normal / Low / Low Power, Commercial Temperature(-25°C ~ 70°C) NOTES : 1. In case of 40MHz Frequency, CL1 can be supported. 2. Samsung are not designed or manufactured for use in a device or system that is used under circumstance in which human life is potentially at stake. Please contact to the memory marketing team in samsung electronics when considering the use of a product contained herein for any specific purpose, such as medical, aerospace, nuclear, military, vehicular or undersea repeater use. February 2004 K4S643233H - F(H)E/N/G/C/L/F FUNCTIONAL BLOCK DIAGRAM Mobile-SDRAM www.DataSheet4U.com I/O Control LWE Data Input Register Bank Select LDQM 512K x 32 Sense AMP 512K x 32 512K x 32 512K x 32 Refresh Counter Output Buffer Row Decoder Row Buffer DQi Address Register LRAS CLK CKE CLK ADD Column Decoder Col. Buffer LRAS LCBR Latency & Burst Length LCKE LCBR LWE LCAS Programming Register LWCBR LDQM Timing Register CS RAS CAS WE DQM February 2004 K4S643233H - F(H)E/N/G/C/L/F Package Dimension and Pin Configuration < Bottom View*1 > E1 9 A B C D D E F G D1 H J K D/2 L M N P R E E/2 Pin Name CLK CS A A1 Substrate(2Layer) Mobile-SDRAM www.DataSheet4U.com < Top View*2 > 90Ball(6x15) FBGA.


K4S643233H-FHN K4S643233H-FHG K4S643233H-FHC


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