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HYS72T64020HR Dataheets PDF



Part Number HYS72T64020HR
Manufacturers Qimonda AG
Logo Qimonda AG
Description 240-Pin Registered DDR2 SDRAM Modules
Datasheet HYS72T64020HR DatasheetHYS72T64020HR Datasheet (PDF)

March 2007 www.DataSheet4U.com HYS72T32000HR–[2.5/3/3S/3.7/5]–A HYS72T64001HR–[2.5/3/3S/3.7/5]–A HYS72T64020HR–[2.5/3/3S/3.7/5]–A 240-Pin Registered DDR2 SDRAM Modules DDR2 SDRAM RDIMM SDRAM RoHS Compliant Internet Data Sheet Rev. 1.21 Internet Data Sheet www.DataSheet4U.com HYS72T[32/64]0xxHR–[2.5/3/3S/3.7/5]–A Registered DDR2 SDRAM Modules HYS72T32000HR–[2.5/3/3S/3.7/5]–A, HYS72T64001HR–[2.5/3/3S/3.7/5]–A, HYS72T64020HR–[2.5/3/3S/3.7/5]–A Revision History: 2007-03, Rev. 1.21 Page All All .

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March 2007 www.DataSheet4U.com HYS72T32000HR–[2.5/3/3S/3.7/5]–A HYS72T64001HR–[2.5/3/3S/3.7/5]–A HYS72T64020HR–[2.5/3/3S/3.7/5]–A 240-Pin Registered DDR2 SDRAM Modules DDR2 SDRAM RDIMM SDRAM RoHS Compliant Internet Data Sheet Rev. 1.21 Internet Data Sheet www.DataSheet4U.com HYS72T[32/64]0xxHR–[2.5/3/3S/3.7/5]–A Registered DDR2 SDRAM Modules HYS72T32000HR–[2.5/3/3S/3.7/5]–A, HYS72T64001HR–[2.5/3/3S/3.7/5]–A, HYS72T64020HR–[2.5/3/3S/3.7/5]–A Revision History: 2007-03, Rev. 1.21 Page All All Chapter 4 Chapter 5 Subjects (major changes since last revision) Qimonda update Adapted internet edition SPD Codes update: Byte 49 Bit 0 = 1 (HighT_SRFEntry) for all product types Package Outlines updated Previous Revision: 2005-09, Rev. 1.2 Previous Revision: 2005-06, Rev. 1.1 We Listen to Your Comments Any information within this document that you feel is wrong, unclear or missing at all? Your feedback will help us to continuously improve the quality of this document. Please send your proposal (including a reference to this document) to: [email protected] qag_techdoc_rev400 / 3.2 QAG / 2006-08-07 09152006-J5FK-C565 2 Internet Data Sheet www.DataSheet4U.com HYS72T[32/64]0xxHR–[2.5/3/3S/3.7/5]–A Registered DDR2 SDRAM Modules 1 Overview This chapter gives an overview of the 240-pin Registered DDR2 SDRAM Modules product family and describes its main characteristics. 1.1 Features • Programmable CAS Latencies (3, 4, 5 & 6), Burst Length (4 & 8) and Burst Type • Auto Refresh (CBR) and Self Refresh • All inputs and outputs SSTL_18 compatible • Off-Chip Driver Impedance Adjustment (OCD) and On-Die Termination (ODT) • Serial Presence Detect with E2PROM • RDIMM Dimensions (nominal): 30 mm high, 133.35 mm wide • Based on Standard reference layouts Raw Card “A-F”, “BG” & “C-H” • RoHS compliant products1) • 240-pin PC2-6400, PC2-5300, PC2-4200 and PC2-3200 DDR2 SDRAM memory modules for PC, Workstation and Server main memory applications • One rank 32M x 72, 64M x 72 and two ranks 64M × 72 module organization and 32M × 8, 64M × 4 chip organization • Standard Double-Data-Rate-Two Synchronous DRAMs (DDR2 SDRAM) with a single + 1.8 V (± 0.1 V) power supply • All Speed Grades faster than DDR2–400 comply with DDR2–400 timing specifications • Built with 256-Mbit DDR2 SDRAMs in P-TFBGA-60 chipsize packages. TABLE 1 Performance for –2.5 & –3 (S) Product Type Speed Code Speed Grade max. Clock Frequency @CL6 @CL5 @CL4 @CL3 min. RAS-CAS-Delay min. Row Precharge Time min. Row Active Time min. Row Cycle Time –2.5 PC2–6400 6–6–6 –3 PC2–5300 4–4–4 333 333 333 200 12 12 45 57 –3S PC2–5300 5–5–5 333 333 266 200 15 15 45 60 MHz MHz MHz ns ns ns ns Unit — fCK6 fCK5 fCK4 fCK3 tRCD tRP tRAS tRC 400 333 266 200 15 15 45 60 1) RoHS Compliant Product: Restriction of the use of certain hazardous substances (RoHS) in electrical and electronic equipment as defined in the directive 2002/95/EC issued by the European Parliament and of the Council of 27 January 2003. These substances include mercury, lead, cadmium, hexavalent chromium, polybrominated biphenyls and polybrominated biphenyl ethers. Rev. 1.21, 2007-03 09152006-J5FK-C565 3 Internet Data Sheet www.DataSheet4U.com HYS72T[32/64]0xxHR–[2.5/3/3S/3.7/5]–A Registered DDR2 SDRAM Modules TABLE 2 Performance for DDR2-533 and DDR2-400 Product Type Speed Code Speed Grade Max. Clock Frequency @CL5 @CL4 @CL3 Min. RAS-CAS-Delay Min. Row Precharge Time Min. Row Active Time Min. Row Cycle Time –3.7 PC2–4200 4–4–4 –5 PC2–3200 3–3–3 200 200 200 15 15 40 55 Units — MHz MHz MHz ns ns ns ns fCK5 fCK4 fCK3 tRCD tRP tRAS tRC 266 266 200 15 15 45 60 Rev. 1.21, 2007-03 09152006-J5FK-C565 4 Internet Data Sheet www.DataSheet4U.com HYS72T[32/64]0xxHR–[2.5/3/3S/3.7/5]–A Registered DDR2 SDRAM Modules 1.2 Description devices and a PLL for the clock distribution. This reduces capacitive loading to the system bus, but adds one cycle to the SDRAM timing. Decoupling capacitors are mounted on the PCB board. The DIMMs feature serial presence detect based on a serial E2PROM device using the 2-pin I2C protocol. The first 128 bytes are programmed with configuration data and are write-protected; the second 128 bytes are available to the customer. The QIMONDA HYS72T[32/64]0xxHR–[2.5/3/3S/3.7/5]–A module family are Registered DIMM modules “RDIMMs” with 30 mm height based on DDR2 technology. DIMMs are available as ECC modules in 32M x 72 (256 MByte) and 64M x 72 (512 MByte) organization and density, intended for mounting into 240-pin connector sockets. The memory array is designed with 256-Mbit Double-DataRate-Two (DDR2) Synchronous DRAMs. All control and address signals are re-driven on the DIMM using register TABLE 3 Ordering Information for RoHS Compliant Products Product Type1) PC2-6400 HYS72T32000HR–2.5–A HYS72T64001HR–2.5–A HYS72T64020HR–2.5–A PC2-5300 HYS72T32000HR–3–A HYS72T64001HR–3–A HYS72T64020HR–3–A HYS72T32000HR–3S–A HYS72T64001HR–3S–A HYS72T64020HR–3S–A PC2–4200 HYS72T32000HR–3.7–A HYS72T64001HR.


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