Document
BUK9215-55A
TrenchMOS™ logic level FET
Rev. 01 — 16 August 2001
M3D300
www.DataSheet4U.com
Product data
1. Description
N-channel enhancement mode field-effect power transistor in a plastic package using TrenchMOS™1 technology, featuring very low on-state resistance. Product availability: BUK9215-55A in SOT428 (D-PAK).
2. Features
s s s s TrenchMOS™ technology Q101 compliant 175 °C rated Logic level compatible.
3. Applications
s Automotive and general purpose power switching: x 12 V and 24 V loads x Motors, lamps and solenoids.
4. Pinning information
Table 1: Pin 1 2 3 mb Pinning - SOT428 (D-PAK), simplified outline and symbol Description gate (g) drain (d) source (s) mounting base; connected to drain (d)
1 Top view g s mb d
Simplified outline
Symbol
MBB076
2 3
MBK091
SOT428 (D-PAK)
1.
TrenchMOS is a trademark of Koninklijke Philips Electronics N.V.
Philips Semiconductors
BUK9215-55A
www.DataSheet4U.com TrenchMOS™ logic level FET
5. Quick reference data
Table 2: VDS ID Ptot Tj RDSon Quick reference data Conditions Tmb = 25 °C; VGS = 5 V Tmb = 25 °C Tj = 25 °C; VGS = 5 V; ID = 25 A Tj = 25 °C; VGS = 4.5 V; ID = 25 A Tj = 25 °C; VGS = 10 V; ID = 25 A
[1]
Symbol Parameter drain-source voltage (DC) drain current (DC) total power dissipation junction temperature drain-source on-state resistance
Typ 13 11
Max 55 62 115 175 15 16.6 13.6
Unit V A W °C mΩ mΩ mΩ
6. Limiting values
Table 3: Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Symbol Parameter VDS VDGR VGS ID drain-source voltage (DC) drain-gate voltage (DC) gate-source voltage (DC) drain current (DC) Tmb = 25 °C; VGS = 5 V; Figure 2 and 3 Tmb = 100 °C; VGS = 5 V; Figure 2 IDM Ptot Tstg Tj IDR IDRM WDSS peak drain current total power dissipation storage temperature operating junction temperature reverse drain current (DC) pulsed reverse drain current non-repetitive avalanche energy Tmb = 25 °C Tmb = 25 °C; pulsed; tp ≤ 10 µs unclamped inductive load; ID = 62 A; VDS ≤ 55 V; VGS = 5 V; RGS = 50 Ω; starting Tj = 25 °C
[1] [2] [1] [2] [1]
Conditions RGS = 20 kΩ
Min −55 −55 -
Max 55 55 ±15 62 55 44 248 115 +175 +175 62 55 248 211
Unit V V V A A A A W °C °C A A A mJ
Tmb = 25 °C; pulsed; tp ≤ 10 µs; Figure 3 Tmb = 25 °C; Figure 1
Source-drain diode
Avalanche ruggedness
[1] [2]
Current is limited by power dissipation chip rating Continuous current is limited by bond wires
9397 750 08633
© Koninklijke Philips Electronics N.V. 2001. All rights reserved.
Product data
Rev. 01 — 16 August 2001
2 of 12
Philips Semiconductors
BUK9215-55A
www.DataSheet4U.com TrenchMOS™ logic level FET
03aa16
120 Pder (%) 100
80 ID (A) 60
03nf79
Capped at 55 A due to limitation of bondwires
80
60
40
40
20
20
0 0 50 100 150
Tmb (ºC)
0
200
25
50
75
100
125
150
175 200 Tmb (ºC)
P tot P der = ---------------------- × 100 % P °
tot ( 25 C )
VGS ≥ 4.5 V.
ID I der = ------------------- × 100 % I °
D ( 25 C )
Fig 1. Normalized total power dissipation as a function of mounting base temperature.
Fig 2. Continuous drain current as a function of mounting base temperature.
103
03nf78
ID (A) RDSon = VDS / ID 102
tp = 10 µs
100 µs
10
P
δ=
tp T
DC
1 ms
10 ms 100 ms
tp T
1 1
t
10
VDS (V)
102
Tmb = 25 °C; IDM is single pulse.
Fig 3. Safe operating area; continuous and peak drain currents as a function of drain-source voltage.
9397 750 08633
© Koninklijke Philips Electronics N.V. 2001. All rights reserved.
Product data
Rev. 01 — 16 August 2001
3 of 12
Philips Semiconductors
BUK9215-55A
www.DataSheet4U.com TrenchMOS™ logic level FET
7. Thermal characteristics
Table 4: Symbol Rth(j-a) Rth(j-mb) Thermal characteristics Parameter thermal resistance from junction to ambient thermal resistance from junction to mounting Figure 4 base Conditions Value 71.4 1.3 Unit K/W K/W
7.1 Transient thermal impedance
10 Zth(j-mb) (K/W) 1 δ = 0.5 0.2 10-1 0.1 0.05 0.02 10-2 Single Shot
tp T P
03nf77
δ=
tp T
t
10-3 10-6 10-5 10-4 10-3 10-2 10-1 tp (s) 1
Fig 4. Transient thermal impedance from junction to mounting base as a function of pulse duration.
9397 750 08633
© Koninklijke Philips Electronics N.V. 2001. All rights reserved.
Product data
Rev. 01 — 16 August 2001
4 of 12
Philips Semiconductors
BUK9215-55A
www.DataSheet4U.com TrenchMOS™ logic level FET
8. Characteristics
Table 5: Characteristics Tj = 25 °C unless otherwise specified Symbol V(BR)DSS Parameter drain-source breakdown voltage Conditions ID = 0.25 mA; VGS = 0 V; Tj = 25 °C Tj = −55 °C VGS(th) gate-source threshold voltage ID = 1 mA; VDS = VGS; Figure 9 Tj = 25 °C Tj = 175 °C Tj = −55 °C IDSS drain-source leakage current VDS = 55 V; VGS = 0 V; Tj = 25 °C Tj = 175 °C IGSS RDSon gate-source leakage current drain-source on-state resistance VGS = ±10 V; VDS = 0 V VGS = 5 V; ID = 25 A Figure 7 and 8 Tj = 25 °C Tj = 175 °C VGS = 4.5 V; ID = 25 A; VGS = 10 V; ID =25 A; Dynamic characteristics Qg(tot) Qgs Qgd Ciss Coss Crss td(on) tr td(off) t.