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HYMD132G725EH4-H Dataheets PDF



Part Number HYMD132G725EH4-H
Manufacturers Hynix Semiconductor
Logo Hynix Semiconductor
Description Registered DDR SDRAM DIMM
Datasheet HYMD132G725EH4-H DatasheetHYMD132G725EH4-H Datasheet (PDF)

www.DataSheet4U.com 32Mx72 bits Registered DDR SDRAM DIMM HYMD132G725E(L)4-M/K/H/L DESCRIPTION Preliminary Hynix HYMD132G725E(L)4-M/K/H/L series is registered 184-pin double data rate Synchronous DRAM Dual In-Line Memory Modules (DIMMs) which are organized as 32Mx72 high-speed memory arrays. Hynix HYMD132G725E(L)4-M/ K/H/L series consists of eighteen 32Mx4 DDR SDRAM in 400mil TSOP II packages on a 184pin glass-epoxy substrate. Hynix HYMD132G725E(L)4-M/K/H/L series provide a high performance 8.

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www.DataSheet4U.com 32Mx72 bits Registered DDR SDRAM DIMM HYMD132G725E(L)4-M/K/H/L DESCRIPTION Preliminary Hynix HYMD132G725E(L)4-M/K/H/L series is registered 184-pin double data rate Synchronous DRAM Dual In-Line Memory Modules (DIMMs) which are organized as 32Mx72 high-speed memory arrays. Hynix HYMD132G725E(L)4-M/ K/H/L series consists of eighteen 32Mx4 DDR SDRAM in 400mil TSOP II packages on a 184pin glass-epoxy substrate. Hynix HYMD132G725E(L)4-M/K/H/L series provide a high performance 8-byte interface in 5.25" width form factor of industry standard. It is suitable for easy interchange and addition. Hynix HYMD132G725E(L)4-M/K/H/L series is designed for high speed of up to 133MHz and offers fully synchronous operations referenced to both rising and falling edges of differential clock inputs. While all addresses and control inputs are latched on the rising edges of the clock, Data, Data strobes and Write data masks inputs are sampled on both rising and falling edges of it. The data paths are internally pipelined and 2-bit prefetched to achieve very high bandwidth. All input and output voltage levels are compatible with SSTL_2. High speed frequencies, programmable latencies and burst lengths allow variety of device operation in high performance memory system. Hynix HYMD132G725E(L)4-M/K/H/L series incorporates SPD(serial presence detect). Serial presence detect function is implemented via a serial 2,048-bit EEPROM. The first 128 bytes of serial PD data are programmed by Hynix to identify DIMM type, capacity and other the information of DIMM and the last 128 bytes are available to the customer. FEATURES • • • • • • • 256MB (32M x 72) Registered DDR DIMM based on 32Mx4 DDR SDRAM JEDEC Standard 184-pin dual in-line memory module (DIMM) Error Check Correction (ECC) Capability Registered inputs with one-clock delay Phase-lock loop (PLL) clock driver to reduce loading 2.5V +/- 0.2V VDD and VDDQ Power supply All inputs and outputs are compatible with SSTL_2 interface • • • • • • • Fully differential clock operations (CK & /CK) with 100MHz/125MHz/133MHz Programmable CAS Latency 2 / 2.5 supported Programmable Burst Length 2 / 4 / 8 with both sequential and interleave mode tRAS Lock-out function supported Internal four bank operations with single pulsed RAS Auto refresh and self refresh supported 4096 refresh cycles / 64ms ORDERING INFORMATION Part No. HYMD132G725E(L)4-M HYMD132G725E(L)4-K HYMD132G725E(L)4-H HYMD132G725E(L)4-L VDD=2.5V VDDQ=2.5V Power Supply Clock Frequency 133MHz (*DDR266:2-2-2) 133MHz (*DDR266A) 133MHz (*DDR266B) 125MHz (*DDR200) Interface Form Factor SSTL_2 184pin Registered DIMM 5.25 x 1.7 x 0.15 inch * JEDEC Defined Specifications compliant This document is a general product description and is subject to change without notice. Hynix Semiconductor does not assume any responsibility for use of circuits described. No patent licenses are implied. Rev. 0.1 / Sep. 2003 1 HYMD132G725E(L)4-M/K/H/L PIN DESCRIPTION Pin CK0, /CK0 .



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