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NB7V585M

Differential1-to-6 CML clock/data distribution

Description

NB7V585M 1.8V / 2.5V Differential 2:1 Mux Input to 1:6 CML Clock/Data Fanout Buffer/Translator Description Multi−Level Inputs w/ Internal Termination The NB7V585M is a differential 1 −to −6 CML clock/data distribution chip featuring a 2:1 Clock/Data input multiplexer with an input select pin. The INx/INx inputs incorporate internal 50 W termination resistor...

ON Semiconductor

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