AD6642

FEATURES 11-bit, 200 MSPS output data rate per channel Integrated noise shaping requantizer (NSR) Performance with NSR enabled SNR: 75.5 dBFS in 40 MHz band to 70 MHz @ 185 MSPS SNR: 73.7 dBFS in 60 MHz band to 70 MHz @ 185 MSPS Performance with NSR disabled SNR: 66.5 dBFS to 70 MHz @ 185 MSPS SFDR: 83 dBc to 70 MHz @ 185 MSPS Low power: 0.62 W @ 185 MSPS 1.8 V analog supply operation 1.8 V LVDS (ANSI-644 levels) output 1-to-8 integer clock divider Internal ADC voltage reference 1.75 V p-p analog input range (programmable to 2.0 V p-p) Differential analog inputs with 800 MHz bandwidth 95 dB channel isolation/crosstalk Serial port control User-configurable built-in self-test (BIST) capability Energy-saving power-down modes APPLICATIONS Communications Diversity radio and smart antenna (MIMO) systems Multimode digital receivers (3G) WCDMA, LTE, CDMA2000 WiMAX, TD-SCDMA I/Q demodulation systems General-purpose software radios Dual IF Receiver AD6642 DATA MULTIPLEXER AND LVDS DRIVERS 08563-001 FUNCTIONAL BLOCK DIAGRAM AVDD AGND DRVDD DRGND VIN+A VIN–A VCMA VIN+B VIN–B VCMB AD6642 14 11 PIPELINE NOISE SHAPING ADC REQUANTIZER 14 PIPELINE NOISE SHAPING 11 ADC REQUANTIZER REFERENCE SERIAL PORT CLOCK DIVIDER DC0±AB D0±AB D10±AB MODE SYNC PDWN SCLK SDIO CSB Figure 1. CLK+ CLK– PRODUCT HIGHLIGHTS 1. Two ADCs are contained in a small, space-saving, 10 mm × 10 mm × 1.4 mm, 144-ball CSP_BGA package. 2. Pin selectable noise shaping requantizer (NSR) function that allows ...