MAX9310A

19-2542; Rev 0; 7/02 1:5 Clock Driver with Selectable LVPECL Inputs/Single-Ended Inputs and LVDS Outputs General Description The MAX9310A is a fast, low-skew 1:5 differential driver with selectable LVPECL inputs and LVDS outputs, designed for clock distribution applications. This device features an ultra-low propagation delay of 340ps with 48mA of supply current. The MAX9310A operates from a 3V to 3.6V power supply for use in 3.3V systems. A 2:1 input multiplexer is used to select one of two differential inputs. The input selection is controlled through the CLKSEL pin. This device features a synchronous enable function. The MAX9310A LVPECL inputs can be driven by either a differential or single-ended signal. A VBB reference voltage output is provided for use with single-ended inputs. The device can also accept differential HSTL signals. The MAX9310A is offered in a space-saving 20-pin TSSOP package and operates over the extended temperature range from -40°C to +85°C. o 8.0ps Output-to-Output Skew o 340ps Propagation Delay o Accepts LVPECL and Differential HSTL Inputs o Synchronous Output Enable/Disable o Two Selectable Differential Inputs o 3V to 3.6V Supply Voltage o On-Chip Reference for Single-Ended Operation o ESD Protection: ±2kV (Human Body Model) o Input Bias Resistors Drive Output Low for Open Inputs Features o Guaranteed 1.0GHz Operating Frequency MAX9310A Applications Data and Clock Drivers and Buffers Central-Office Backplane Clock Distribution DSLAM Base Stati...