SPC5634M

MPC5634M 144 LQFP 20 mm x 20 mm 208 MAPBGA 17 mm x 17 mm MPC5634M Microcontroller Data Sheet Operating Parameters – Fully static operation, 0 MHz - 80 MHz (plus 2% frequency modulation - 82 MHz) – -40 °C to 150 °C junction temperature operating range – Low power design – Less than 400 mW power dissipation (nominal) – Designed for dynamic power management of core and peripherals – Software controlled clock gating of peripherals – Low power stop mode, with all clocks stopped – Fabricated in 90 nm process – 1.2 V internal logic High performance e200z335 core processor Advanced microcontroller bus architecture (AMBA) crossbar switch (XBAR) Enhanced direct memory access (eDMA) controller Interrupt controller (INTC) – 191 peripheral interrupt request sources, plus 165 reserved positions – Low latency—three clocks from receipt of interrupt request from peripheral to interrupt request to processor www.DataSheet4U.com Frequency Modulating Phase-locked loop (FMPLL) Calibration bus interface (EBI) (available only in the calibration package) System integration unit (SIU) centralizes control of pads, GPIO pins and external interrupts. Error correction status module (ECSM) provides configurable error-correcting codes (ECC) reporting Up to 1.5 MB on-chip flash memory Up to 94 KB on-chip static RAM Boot assist module (BAM) enables and manages the transition of MCU from reset to user code execution from internal flash memory, external memory on the calibration bus or ...