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SL2ICS2001DW

NXP

I-CODE SLI Label IC bumped wafer specification on UV-tape

SL2ICS2001DW/V1D I-CODE SLI Label IC bumped wafer specification on UV-tape Rev. 3.0 — 5 February 2008 150030 Product da...


NXP

SL2ICS2001DW

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SL2ICS2001DW/V1D I-CODE SLI Label IC bumped wafer specification on UV-tape Rev. 3.0 — 5 February 2008 150030 Product data sheet addendum PUBLIC 1. General description This specification describes the electrical, physical and dimensional properties of Au-bumped sawn wafers on FFC with UV-tape of I-CODE SLI Label ICs on an NXP C075EE process and is the base for delivery of tested I-CODE SLI Label ICs. 2. Ordering information Table 1. Ordering information Package Name Description Bumped die on sawn wafer on UV-tape Odering code Type number SL2ICS2001DW/V1D 9352 795 61005 3. Mechanical specification 3.1 Wafer Diameter: Thickness: 3.2 Wafer backside Material: Treatment: Roughness: Si ground and stress release Ra max. 0.5 μm Rt max. 5 μm 8” 150 μm ± 15 μm www.DataSheet4U.com 3.3 Chip dimensions Chip size: Scribe lines: 3.4 Passivation Type: Material: Thickness: sandwich structure PSG / Nitride (on top) 500 nm / 600 nm 900 x 780 μm2 80 / 80 μm NXP Semiconductors SL2ICS2001DW/V1D I-CODE SLI Label IC bumped wafer specification on UV-tape PUBLIC 3.5 Au bump Bump material: Bump hardness: Bump shear strength: Bump height: Bump height uniformity: – within a die: – within a wafer: – wafer to wafer: ± 2 μm ± 3 μm ± 4 μm ± 1.5 μm 92 x 92 μm2 62 x 62 μm2 78 x 78 μm2 48 x 48 μm2 ± 5 μm sputtered TiW > 99.9 % pure Au 35 – 80 HV 0.005 > 70 MPa 18 μm Bump flatness: Bump size: – LA, LB – VSS1, TESTIO1 Pad size (unbumped): – LA, LB – VSS1, TESTIO1 ...




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