Document
PRELIMINARY PRODUCT INFORMATION
MOS INTEGRATED CIRCUIT
µPD161661
POWER SUPPLY FOR TFT-LCD DRIVER
DESCRIPTION
The µPD161661 is a power supply IC for TFT-LCD driver. This ICs can generate the levels which TFT-LCD driver need, from single voltage input.
FEATURES
• To generate 3 levels from single voltage input • To integrate regulator circuit for source driver
ORDERING INFORMATION
Part number Package Chip/Wafer
µPD161661P/W
Remark
Purchasing the above chip entails the exchange of documents such as a separate memorandum or product quality, so please contact one of our sales representative.
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The information contained in this document is being issued in advance of the production cycle for the device. The parameters for the device may change before final production or NEC Corporation, at its own discretion, may withdraw the device prior to its production. Not all devices/types available in every country. Please check with local NEC representative for availability and additional information.
Document No. S15917EJ1V0PM00 (1st edition) Date Published January 2002 NS CP(K) Printed in Japan
©
2002
µPD161661
1. BLOCK DIAGRAM/SYSTEM DIAGRAM
VDC VSS DCON CR Oscillator
C1+ C1− C2+ C2− C3+
DC/DC Converter Contorl
FS LFS LPM Divider
DC/DC Converter
C3− C4+ C4− C5+
RGONP EXRVS RSEL
VDC x3 Regulator Control RC1 RC2
VDC x6
C5−
VO
0 V (VSS)
VREG VREFSEL
VREF VDD1 VDD2
VREF VS MVS RC1 ACS LACS
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VEE
RC1
TESTIN1TESTIN3 TESTOUT RC2
Remark /xxx indicates active low signal.
2
Preliminary Product Information S15917EJ1V0PM
µPD161661
2. PIN CONFIGURATION (Pad Layout)
Chip size: X = 3.60 mm, Y = 3.40 mm Pad size : 100 x 100 µm TYP. (1) Alignment mark T.B.D.
2
(2) Arrangement
DUMMY DUMMY
C5+
C4+
C3+
C2+
C1+
C5−
C4−
C3−
C2−
24 DUMMY VDD1 DUMMY VO DUMMY Y DUMMY X DUMMY
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C1−
13 12 Chip Surface (Bump size) DUMMY VDC VSS VDD2 VS MVS DUMMY DUMMY DCON RGONP LPM
25
TESTIN1
TESTIN2 TESTIN3 TESTOUT DUMMY 36 37 D161661 48 1
DUMMY
DUMMY
DUMMY
Remark T.B.D. : To be determined.
VREFSEL
DUMMY
EXRVS
VSS
LACS
ACS
VREF
RSEL
LFS
FS
Preliminary Product Information S15917EJ1V0PM
3
µPD161661
Table 2-1. Pad Layout
Pad No. 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 Pad name DUMMY LPM RGONP DCON DUMMY DUMMY MVS VS VDD2 VSS VDC DUMMY DUMMY C1 C1
− + −
X[mm] 1632 1632 1632 1632 1632 1632 1632 1632 1632 1632 1632 1632 1237.5 1012.5 787.5 562.5 337.5 112.5 −112.5 −337.5 −562.5 −787.5 −1012.5 −1237.5 −1632 −1632 −1632 −1632 −1632 −1632 −1632 −1632 −1632 −1632 −1632 −1632
Y[mm] −1237.5 −1012.5 −787.5 −562.5 −337.5 −112.5 112.5 337.5 562.5 787.5 1012.5 1237.5 1532 1532 1532 1532 1532 1532 1532 1532 1532 1532 1532 1532 1237.5 1012.5 787.5 562.5 337.5 112.5 −112.5 −337.5 −562.5 −787.5 −1012.5 −1237.5
Pad No. 37 38 39 40 41 42 43 44 45 46 47 48
Pad name DUMMY EXRVS LFS FS RSEL ACS VREFSEL LACS VSS VREF DUMMY DUMMY
X[mm] −1237.5 −1012.5 −787.5 −562.5 −337.5 −112.5 112..