3.3.2. Power On/Off Sequence
www.DataSheet4U.com0.5 < t1 ≤ 10 msec
0 < t2 ≤ 50 msec
0 < t3 ≤ 50 msec
t4 ≥ 500 msec
t5 ≥ 200 msec
t6 ≥ 200 msec
Note (1) Please avoid floating state of interface signal during invalid period.
Note (2) When the interface signal is invalid, be sure to pull down the power supply of LCD VCC to 0 V.
Note (3) The Backlight power must be turned on after the power supply for the logic and the interface
signals are valid. The Backlight power must be turned off before the power supply for the logic
and the interface signal is invalid.
Document: TS‐002‐467‐01‐R0 2/27/2008 Page. 7 of 24