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1.5A LOW VOLTAGE LOW DROPOUT CMOS REGULATOR
FSP2161
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FEATURES
Low-Dropout Regulator Supports Input Voltages Down to 1.4V Output Voltage Available in 0.9V, 1.0V, 1.2V, 1.5V, 1.8V, 2.5V,2.8V,2.85V,3.0V, 3.3V Stable with a Ceramic Output Capacitor of 1.0uF or Higher Low Dropout Voltage:150mV at 1.5A Low Quiescent Current Over Temperature Shutdown Short Circuit Protection Low Temperature Coefficient Standard TO252 and TO263 Packages
GENERAL DESCRIPTION
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APPLICATIONS
DSP, FPGA, and Microprocessor Power Supplies 1.2V Core Voltage for DSPs SATA Power Supply LCD TV/ Monitors Wireless Devices Communication Devices Portable Electronics Post Regulator for SMPS
The FSP2161 is a 1.5A CMOS LDO regulator that features a low quiescent current, ultra low input, output and dropout voltages, as well as over temperature shutdown. It is available in TO252 and TO263 packages. The fixed output voltage of the FSP2161 is set at the factory and trimmed to ±2%. The FSP2161 is stable with a ceramic output capacitor of 1.0uF or higher. This family of regulators can provide either a stand-alone power supply solution or act as a post regulator for switch mode power supplies. They are particularly well suited for applications requiring low input and output voltage
PIN CONFIGURATION
(Top View) 2) TO263 (Top View)
1) TO252
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Pin Number TO252 1 2 3 TO263 1 3 5 2 4
Pin Name VIN GND VOUT EN PWRGD
Pin Function Input Ground Output Enable pin Power good
BLOCK DIAGRAM
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2007-12-6
1.5A LOW VOLTAGE LOW DROPOUT CMOS REGULATOR
FSP2161
TYPICAL APPLICATIONS CIRCUITS
ABSOLUTE MAXIMUM RATINGS
Parameter Input Supply Voltage Maximum Output Current Output Pin Voltage Internal Power Dissipation Junction to Case Thermal Resistance (θJC) Junction to Ambient Thermal Resistance (θJA) Operating temperature Operating Junction Temperature Storage Temperature Maximum Junction Temperature Rating +4 PD/(VIN-VO) -0.3 to VIN+0.3 1200 7 90 -40 to 85 -40 to 125 -65 to 150 150 Unit V V mW ℃/ W ℃/ W °C °C °C °C
Lead Temperature (Soldering, 5 sec) 300 °C Note: These are stress ratings only and functional operation is not implied. Exposure to absolute maximum ratings for prolonged time periods may affect device reliability. All voltages are with respect to ground.
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RECOMMENDED OPERATING CONDITIONS
Parameter Input Supply Voltage Operating temperature Operating Junction Temperature Rating 1.4 to 3.6 -40 to 85 -40 to 125 Unit V °C °C
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1.5A LOW VOLTAGE LOW DROPOUT CMOS REGULATOR
(VOUT = VIN + 0.5V, CIN = 1µF, CO = 2.2µF, TA= 25°C unless otherwise specified.) PARAMETER Input Voltage Output Voltage Accuracy Short Circuit Current Ground Current Quiescent Current Line Regulation Load Regulation Error Temperature Coefficient Over Temperature Shutdown Over Temperature Hystersis Power Supply Ripple Rejection SYMBOL VIN VO ISC IGND IQ LNR LDR TC OTS OTH PSRR TEST CONDITIONS IO= 100mA VO < 0.3V IO= 1mA to 1.5A IO= 0mA IO= 10mA, VO ≤ 2.5V VIN =VO + 0.5V to VO + 1.5V IO= 10mA, VO>2.5V VIN = 3.3V to 3.6V IO = 1mA to 1.5A MIN Note1 -2 1.0 90 0.5 0.5 0.5 40 150 50 55 55 35 330 220 50 40 330 220 150 120 40 600 150 1 %/V 1 2 %/A ppm/°C °C °C dB 500 400 200 150 500 400 350 300 µVRMS mV TYP MAX 3.6 +2 UNIT V % A µA µA
ELECTRICAL CHARACTERISTICS
FSP2161
IO = 100mA Vo =1.5V
IO = 500mA Dropout Voltage VDROP IO = 1.5A
f=100Hz f= 1KHz f= 10KHz VO= 0.9V VO= 1.0V 1.2V ≤ VO < 2.5V VO ≥ 2.5V VO= 0.9V VO= 1.0V 1.2V ≤ VO < 2.5V VO ≥ 2.5V
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Output Noise
Vn
f = 10Hz to 100kHz
Note 1:The minimum input voltage of the FSP2161 is determined by output voltage and dropout voltage. The minimum input voltage is defined as: VIN(MIN)=VO+VDROP
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1.5A LOW VOLTAGE LOW DROPOUT CMOS REGULATOR
FSP2161
APPLICATION INFORMATION
The FSP2161 family of low-dropout (LDO) regulators have several features that allow them to apply to a wide range of applications. The family operates with very low input voltage (1.4V) and low dropout voltage (typically 150mV at full load), making it an efficient stand-alone power supply or post regulator for battery or switch mode power supplies. The 1.5A output current make the FSP2161 family suitable for powering many microprocessors and FPGA supplies. The FSP2161 family also has low output noise (typically 40µVRMS with 2.2µF output capacitor), making it ideal for use in telecom equipment. External Capacitor Requirements A 2.2µF or larger ceramic input bypass capacitor, connected between VIN and GND and located close to the FSP2161, is required for stability. A 1.0uF minimum value capacitor from VO to GND is also required. To improve transient response, noise rejection, and ripple rejection, an additional 10µF or larger, low ESR capacitor is recommended at the output. A higher-value, low ESR output capacitor may be necessary if large, fast-rise-time load transients are anticipated and the device is located .