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300MA HIGH PSRR LOW DROPOUT CMOS LINEAR REGULATOR
FSP2131
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FEATURES
Low dropout voltage: 180mV at 300mA (Vo=3.3V) Quiescent current: Typ. 65µA 2% Voltage Accuracy High PSRR: 70dB at 1KHz Thermal Shutdown Current Limiting Excellent line and load regulation Fast response Short circuit protection Low temperature coefficient Space saving SOT23-3L package
GENERAL DESCRIPTION
The FSP2131 series of positive voltage linear regulators feature low quiescent current (Typ. 65µA) and low dropout voltage, making them ideal for battery powered applications. Their high PSRR make them useful in applications where AC noise on the input power supply must be suppressed. Space saving SOT23-3L package is attractive for portable and handheld applications. They have both thermal shutdown and a current limit feature to prevent device failure from extreme operating conditions. They are stable with an output capacitor of 2.2µF or greater.
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APPLICATIONS
Cordless phones Cellular phones Bluetooth earphones Digital Cameras Portable electronics WLANs MP3 players
PIN CONFIGURATION
(Top View)
1 3 2
PIN DESCRIPTION
Pin Number 1 2 3 Pin Name VIN VOUT GND Pin Function Input Output Ground
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BLOCK DIAGRAM
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300MA HIGH PSRR LOW DROPOUT CMOS LINEAR REGULATOR
FSP2131
TYPICAL APPLICATIONS CIRCUITS
ABSOLUTE MAXIMUM RATINGS
Parameter Input Supply Voltage Output Current Output Pin Voltage ESD Rating Internal Power Dissipation Junction to Case Thermal Resistance (θJC) Junction to Ambient Thermal Resistance (θJA) Operating temperature Operating Junction Temperature Storage Temperature Rating +6 300 GND-0.3 to VIN+0.3 Class B 400 130 250 -40 to 85 -40 to 125 -65 to 150 mW ℃/ W ℃/ W °C °C °C °C Unit V mA V
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Lead Temperature (Soldering, 5 sec) 300 Note: Absolute Maximum Ratings are those values beyond which the life of a device may be impaired.
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300MA HIGH PSRR LOW DROPOUT CMOS LINEAR REGULATOR
FSP2131
ELECTRICAL CHARACTERISTICS
PARAMETER Input Voltage Output Voltage Accuracy Output Current Ground Current Quiescent Current SYMBOL VIN VO IO IGND IQ
(VIN = VO + 1V, CIN = 1µF, CO = 2.2µF, TA= 25°C unless otherwise specified.) TEST CONDITIONS IO= 1mA IO= 1mA to 300mA IO= 0mA IO= 1mA, VO < 2V VIN =2.8V to 3.8V IO= 1mA, 2≤ VO < 3.3V VIN =VO + 0.5V to VO + 1V IO= 1mA, VO ≥3.3V VIN =VO + 0.5V to VO + 1V IO = 1mA to 300mA IO = 1mA IO = 1mA IO = 1mA IO = 100mA f=100Hz CBYP = 10nF f= 1KHz Vo =1.8V f= 10KHz IO = 100mA Vo =1.8V f=100Hz f= 1KHz f= 10KHz VO= 1.8V 2.5 ≤ VO < 3.3V VO ≥ 3.3V MIN Note1 -2 300 70 65 -0.15 -0.1 -0.4 -1 0.1 0.03 0.2 0.2 40 150 30 70 70 50 70 60 40 850 370 180 50 TYP MAX 5.5 +2 Note2 90 90 0.15 0.1 0.4 1 % ppm/°C °C °C %/V UNIT V % mA µA µA
Line Regulation
LNR
Load Regulation Error Temperature Coefficient Over Temperature Shutdown Over Temperature Hystersis Power Supply Ripple Rejection (with bypass Cap.) Power Supply Ripple Rejection (without bypass Cap.)
LDR TC OTS OTH PSRR
dB
PSRR
Dropout Voltage Output Noise
VDO Vn
IO = 300mA
1100 450 230
mV µVRMS
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CBYP =10nF, f = 10Hz to 100kHz
Note 1:The minimum input voltage of the FSP2131 is determined by output voltage and dropout voltage. The minimum input voltage is defined as: VIN(MIN)=VO+VDROP Note 2:Output current is limited by PD, maximum IO=PD/(VIN(MAX)-VO)
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300MA HIGH PSRR LOW DROPOUT CMOS LINEAR REGULATOR
FSP2131
APPLICATION INFORMATION
Capacitor Selection and Regulator Stability Similar to any low dropout regulator, the external capacitors used with the FSP2131 must be carefully selected for regulator stability and performance. Using a capacitor, CIN, whose value is >1μF at the FSP2131 input pin, the amount of the capacitance can be increased without limit. Please note that the distance between CIN and the input pin of the FSP2131 should not exceed 0.5 inch. Ceramic capacitors are suitable for the FSP2131. Capacitors with larger values and lower ESR provide better PSRR and line-transient response. The FSP2131 is designed specifically to work with low ESR ceramic output capacitors in order to save space and improve performance. Using an output ceramic capacitor whose value is >2.2μF with ESR>5mΩ ensure stability. A 10nF bypass capacitor connected to BYP pin is suggested for suppressing output noise. The capacitor, in series connection with an internal 200kΩ resistor, forms a low-pass filter for noise reduction. Increasing the capacitance will slightly decrease the output noise, but increase the start-up time. Load Transient Considerations The figure11 shows the FSP2131 load transient response. It shows two components the output response: a DC shift from the output impedance due to the load current change and transient response. The DC shift is quite small due to excellent load regulation of the FSP2131. The transient spike, resulting from a step change in the load current from 1mA to 300mA, is 20mV. Th.