P Channel Enhancement Mode MOSFET
The STP3481 is the P-Channel logic enhancement mode power field effect transistors
are produced using high cell density , DMOS trench technology.
This high density process is especially tailored to minimize on-state resistance.
These devices are particularly suited for low voltage application such as cellular phone
and notebook computer power management and other battery powered circuits, and
low in-line power loss are needed in a very small outline surface mount package.
z -30V/-5.2A, RDS(ON) = 55m-ohm
@VGS = -10V
z -30V/-4.2A, RDS(ON) = 75m-ohm
@VGS = -4.5V
z Super high density cell design for
extremely low RDS(ON)
z Exceptional on-resistance and maximum
DC current capability
z TSOP-6P package design
220.127.116.11.Drain 3.Gate 4.Source
Y: Year Code A: Process Code
※ Process Code : A ~ Z ; a ~ z
120 Bentley Square, Mountain View, Ca 94040 USA
STP3481 2006. V1