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ICS5310I-01 Dataheets PDF



Part Number ICS5310I-01
Manufacturers Integrated Circuit Systems
Logo Integrated Circuit Systems
Description ECL/LVPECL FANOUT BUFFER
Datasheet ICS5310I-01 DatasheetICS5310I-01 Datasheet (PDF)

www.DataSheet4U.com Integrated Circuit Systems, Inc. ICS85310I-01 LOW SKEW, 1-TO-10 DIFFERENTIAL-TO-2.5V/3.3V ECL/LVPECL FANOUT BUFFER FEATURES • Ten differential 2.5V/3.3V LVPECL / ECL outputs • Two selectable differential input pairs • CLKx, nCLKx pairs can accept the following differential input levels: LVPECL, LVDS, LVHSTL, SSTL, HCSL • Maximum output frequency: 700MHz • Translates any single ended input signal to 3.3V LVPECL levels with resistor bias on nCLK input • Output skew: 30ps (typ.

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www.DataSheet4U.com Integrated Circuit Systems, Inc. ICS85310I-01 LOW SKEW, 1-TO-10 DIFFERENTIAL-TO-2.5V/3.3V ECL/LVPECL FANOUT BUFFER FEATURES • Ten differential 2.5V/3.3V LVPECL / ECL outputs • Two selectable differential input pairs • CLKx, nCLKx pairs can accept the following differential input levels: LVPECL, LVDS, LVHSTL, SSTL, HCSL • Maximum output frequency: 700MHz • Translates any single ended input signal to 3.3V LVPECL levels with resistor bias on nCLK input • Output skew: 30ps (typical) • Part-to-part skew: 140ps (typical) • Propagation delay: 2ns (typical) • Additive phase jitter, RMS: <0.13ps (typical) • LVPECL mode operating voltage supply range: VCC = 2.375V to 3.8V, VEE = 0V • ECL mode operating voltage supply range: VCC = 0V, VEE = -2.375V to -3.8V • -40°C to 85°C ambient operating temperature • Available in both standard and lead-free RoHS compliant packages GENERAL DESCRIPTION The ICS85310I-01 is a low skew, high performance 1-to-10 Differential-to-2.5V/3.3V ECL/ HiPerClockS™ LVPECL Fanout Buffer and a member of the HiPerClockS™ family of High Perfor mance Clock Solutions from ICS. The CLKx, nCLKx pairs can accept most standard differential input levels. The ICS85310I-01 is characterized to operate from either a 2.5V or a 3.3V power supply. Guaranteed output and partto-part skew characteristics make the ICS85310I-01 ideal for those clock distribution applications demanding well defined performance and repeatability. IC S BLOCK DIAGRAM CLK0 nCLK0 CLK1 nCLK1 0 1 Q0 nQ0 PIN ASSIGNMENT VCCO VCCO nQ0 nQ1 nQ2 Q1 nQ1 Q2 nQ2 32 31 30 29 28 27 26 25 VCC CLK_SEL CLK0 nCLK0 nc CLK1 nCLK1 VEE 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 VCCO nQ9 Q9 nQ8 Q8 nQ7 Q7 VCCO Q0 Q1 Q2 24 23 22 Q3 nQ3 Q4 nQ4 Q5 nQ5 Q6 nQ6 CLK_SEL Q3 nQ3 Q4 nQ4 Q5 nQ5 Q6 nQ6 Q7 nQ7 Q8 nQ8 Q9 nQ9 ICS85310I-01 21 20 19 18 17 32-Lead LQFP 7mm x 7mm x 1.4mm package body Y Package Top View 85310AYI-01 www.icst.com/products/hiperclocks.html 1 REV. F JANUARY16, 2006 www.DataSheet4U.com Integrated Circuit Systems, Inc. ICS85310I-01 LOW SKEW, 1-TO-10 DIFFERENTIAL-TO-2.5V/3.3V ECL/LVPECL FANOUT BUFFER Type Description TABLE 1. PIN DESCRIPTIONS Number 1 2 3 4 5 6 7 8 9, 16, 25, 32 10, 11 12, 13 14, 15 17, 18 19, 20 21, 22 23, 24 26, 27 28, 29 30, 31 Name VCC CLK_SEL CLK0 nCLK0 nc CLK1 nCLK1 VEE VCCO nQ9, Q9 nQ8, Q8 nQ7, Q7 nQ6, Q6 nQ5, Q5 nQ4, Q4 nQ3, Q3 nQ2, Q2 nQ1, Q1 nQ0, Q0 Power Input Input Input Unused Input Input Power Power Output Output Output Output Output Output Output Output Output Output Pullup Positive supply pin. Clock select input. When HIGH, selects CLK1, nCLK1 inputs. When LOW, Pulldown selects CLK0, nCLK0 inputs. LVCMOS / LVTTL interface levels. Pulldown Non-inver ting differential clock input. Pullup Inver ting differential clock input. No connect. Pulldown Non-inver ting differential clock input. Inver ting differential clock input. Negative supply pin. Output supply pins. Differential output pair. LVPECL interface levels. Differential output pair. LVPECL interface levels. Differential output pair. LVPECL interface levels. Differential output pair. LVPECL interface levels. Differential output pair. LVPECL interface levels. Differential output pair. LVPECL interface levels. Differential output pair. LVPECL interface levels. Differential output pair. LVPECL interface levels. Differential output pair. LVPECL interface levels. Differential output pair. LVPECL interface levels. NOTE: Pullup and Pulldown refer to internal input resistors. See Table 2, Pin Characteristics, for typical values. TABLE 2. PIN CHARACTERISTICS Symbol CIN RPULLUP RPULLDOWN Parameter Input Capacitance Input Pullup Resistor Input Pulldown Resistor Test Conditions Minimum Typical 4 51 51 Maximum Units pF kΩ kΩ 85310AYI-01 www.icst.com/products/hiperclocks.html 2 REV. F JANUARY16, 2006 www.DataSheet4U.com Integrated Circuit Systems, Inc. ICS85310I-01 LOW SKEW, 1-TO-10 DIFFERENTIAL-TO-2.5V/3.3V ECL/LVPECL FANOUT BUFFER ABSOLUTE MAXIMUM RATINGS Supply Voltage, VCC Inputs, VI Outputs, IO Continuous Current Surge Current Package Thermal Impedance, θJA Storage Temperature, TSTG 4.6V -0.5V to VCC + 0.5V 50mA 100mA 47.9°C/W (0 lfpm) -65°C to 150°C NOTE: Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These ratings are stress specifications only. Functional operation of product at these conditions or any conditions beyond those listed in the DC Characteristics or AC Characteristics is not implied. Exposure to absolute maximum rating conditions for extended periods may affect product reliability. TABLE 3A. POWER SUPPLY DC CHARACTERISTICS, VCC = VCCO = 2.375V TO 3.8V, TA = -40°C TO 85°C Symbol VCC VCCO IEE Parameter Positive Supply Voltage Output Supply Voltage Power Supply Current Test Conditions Minimum 2.375 2.375 Typical 3.3 3.3 Maximum 3.8 3.8 120 Units V V mA Table 3B. LVCMOS/LVTTL DC Characteristics, VCC = VCCO = 2.375V to 3.8V, TA = -40°C to 85°C Symbol VIH VIL IIH .


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