SYS8512FKX-12

www.DataSheet4U.com 512K x 8 SRAM MODULE SYS8512FKX-70/85/10/12 Issue 5.0: November 1999 Description The SYS8512FKX is plastic 4M Static RAM Module housed in a standard 32 pin Dual-In-Line package organised as 512K x 8. The module utilises fast SRAMs housed in TSOP packages, and uses double sided surface mount techniques, buried decoder and dual board construction to achieve a very high density module. The module has Chip Select, Write Enable and Output Enable control inputs; the Output Enable pin allows faster access times than address access during a Read Cycle. Features Access Times of 70/85/100/120 ns. Low seated height 32 Pin 0.6" Dual-In-Line package with JEDEC compatible pinout. 5 Volt Supply ± 10%. Low Power Dissipation: Average (min cycle) 605mW (maximum). Standby (CMOS) 44mW (maximum). Completely Static Operation. Equal Access and Cycle Times. All Inputs and Outputs Directly TTL Compatible. On-board Supply Decoupling Capacitors. Block Diagram AO - A 16 D0 - D7 WE Pin Definition A18 A16 A14 A12 A7 A6 A5 A4 A3 A2 A1 A0 D0 D1 D2 GND 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 VCC A15 A17 WE A13 A8 A9 A11 OE A10 CS D7 D6 D5 D4 D3 OE 128K x 8 SRAM CS 128K x 8 SRAM CS 128K x 8 SRAM CS 128K x 8 SRAM CS DECODER Pin Functions A17 CS A18 Address Inputs Data Input/Output Chip Select Input Read/Write Input Output Enable Input Power (+5V) Ground PACKAGE TOP VIEW A0 - A18 D0 - D7 CS WE OE VCC GND ISSUE 5.0 ...