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UM10336 Dataheets PDF



Part Number UM10336
Manufacturers NXP
Logo NXP
Description User Manual
Datasheet UM10336 DatasheetUM10336 Datasheet (PDF)

www.DataSheet4U.com UM10336 P89LPC9201/9211/922A1/9241/9251 User manual Rev. 01 — 22 April 2009 User manual Document information Info Keywords Abstract Content P89LPC9201/9211/922A1/9241/9251 Technical information for the P89LPC9201/9211/922A1/9241/9251 device NXP Semiconductors www.DataSheet4U.com UM10336 P89LPC9201/9211/922A1/9241/9251 User manual Revision history Rev 01 Date 20090422 Description Initial version. Contact information For more information, please visit: http://www.nxp.com .

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www.DataSheet4U.com UM10336 P89LPC9201/9211/922A1/9241/9251 User manual Rev. 01 — 22 April 2009 User manual Document information Info Keywords Abstract Content P89LPC9201/9211/922A1/9241/9251 Technical information for the P89LPC9201/9211/922A1/9241/9251 device NXP Semiconductors www.DataSheet4U.com UM10336 P89LPC9201/9211/922A1/9241/9251 User manual Revision history Rev 01 Date 20090422 Description Initial version. Contact information For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: [email protected] UM10336_1 © NXP B.V. 2009. All rights reserved. User manual Rev. 01 — 22 April 2009 2 of 126 NXP Semiconductors www.DataSheet4U.com UM10336 P89LPC9201/9211/922A1/9241/9251 User manual 1. Introduction The P89LPC9201/9211/922A1/9241/9251 are single-chip microcontroller, available in low cost packages, based on a high performance processor architecture that executes instructions in two to four clocks, six times the rate of standard 80C51 devices. Many system-level functions have been incorporated into the P89LPC9201/9211/922A1/9241/9251 in order to reduce component count, board space, and system cost. 1.1 Pin configuration P0.0/CMP2/KBI0 P1.7 P1.6 P1.5/RST VSS P3.1/XTAL1 P3.0/XTAL2/CLKOUT P1.4/INT1 P1.3/INT0/SDA 1 2 3 4 5 6 7 8 9 20 P0.1/CIN2B/KBI1 19 P0.2/CIN2A/KBI2 18 P0.3/CIN1B/KBI3 17 P0.4/CIN1A/KBI4 16 P0.5/CMPREF/KBI5 15 VDD 14 P0.6/CMP1/KBI6 13 P0.7/T1/KBI7 12 P1.0/TXD 11 P1.1/RXD 002aae426 P89LPC9201/9211/ 922A1 P1.2/T0/SCL 10 Fig 1. P89LPC9201/9211/922A1 TSSOP20 pin configuration P0.0/CMP2/KBI0 P1.7 P1.6 P1.5/RST VSS P3.1/XTAL1 P3.0/XTAL2/CLKOUT P1.4/INT1 P1.3/INT0/SDA 1 2 3 4 5 6 7 8 9 20 P0.1/CIN2B/KBI1/AD10 19 P0.2/CIN2A/KBI2/AD11 18 P0.3/CIN1B/KBI3/AD12 17 P0.4/CIN1A/KBI4/AD13/DAC1 16 P0.5/CMPREF/KBI5 15 VDD 14 P0.6/CMP1/KBI6 13 P0.7/T1/KBI7 12 P1.0/TXD 11 P1.1/RXD 002aae425 P89LPC9241/9251 P1.2/T0/SCL 10 Fig 2. P89LPC9241/9251 TSSOP20 pin configuration UM10336_1 © NXP B.V. 2009. All rights reserved. User manual Rev. 01 — 22 April 2009 3 of 126 NXP Semiconductors www.DataSheet4U.com UM10336 P89LPC9201/9211/922A1/9241/9251 User manual P89LPC922A1 P0.0/CMP2/KBI0 P1.7 P1.6 P1.5/RST VSS P3.1/XTAL1 P3.0/XTAL2/CLKOUT P1.4/INT1 P1.3/INT0/SDA 1 2 3 4 5 6 7 8 9 20 P0.1/CIN2B/KBI1 19 P0.2/CIN2A/KBI2 18 P0.3/CIN1B/KBI3 17 P0.4/CIN1A/KBI4 16 P0.5/CMPREF/KBI5 15 VDD 14 P0.6/CMP1/KBI6 13 P0.7/T1/KBI7 12 P1.0/TXD 11 P1.1/RXD 002aae427 P1.2/T0/SCL 10 Fig 3. P89LPC922A1 DIP20 pin configuration 1.2 Pin description Table 1. Symbol Pin description Pin TSSOP20, DIP20 P0.0 to P0.7 I/O Port 0: Port 0 is an 8-bit I/O port with a user-configurable output type. During reset Port 0 latches are configured in the input only mode with the internal pull-up disabled. The operation of Port 0 pins as inputs and outputs depends upon the port configuration selected. Each port pin is configured independently. Refer to Section 5.1 “Port configurations” for details. The Keypad Interrupt feature operates with Port 0 pins. All pins have Schmitt trigger inputs. Port 0 also provides various special functions as described below: P0.0/CMP2/ KBI0 1 I/O O I P0.1/CIN2B/ KBI1/AD10 20 I/O I I I P0.2/CIN2A/ KBI2/AD11 19 I/O I I I P0.0 — Port 0 bit 0. CMP2 — Comparator 2 output KBI0 — Keyboard input 0. P0.1 — Port 0 bit 1. CIN2B — Comparator 2 positive input B. KBI1 — Keyboard input 1. AD10 — ADC1 channel 0 analog input. (P89LPC9241/9251) P0.2 — Port 0 bit 2. CIN2A — Comparator 2 positive input A. KBI2 — Keyboard input 2. AD11 — ADC1 channel 1 analog input. (P89LPC9241/9251) Type Description UM10336_1 © NXP B.V. 2009. All rights reserved. User manual Rev. 01 — 22 April 2009 4 of 126 NXP Semiconductors www.DataSheet4U.com UM10336 P89LPC9201/9211/922A1/9241/9251 User manual Table 1. Symbol Pin description …continued Pin TSSOP20, DIP20 Type Description P0.3/CIN1B/ KBI3/AD12 18 I/O I I I P0.3 — Port 0 bit 3. High current source. CIN1B — Comparator 1 positive input B. KBI3 — Keyboard input 3. AD12 — ADC1 channel 2 analog input. (P89LPC9241/9251) P0.4 — Port 0 bit 4. High current source. CIN1A — Comparator 1 positive input A. KBI4 — Keyboard input 4. DAC1 — Digital-to-analog converter output 1. (P89LPC9241/9251) AD13 — ADC1 channel 3 analog input. (P89LPC9241/9251) P0.5 — Port 0 bit 5. High current source. CMPREF — Comparator reference (negative) input. KBI5 — Keyboard input 5. P0.6 — Port 0 bit 6. High current source. CMP1 — Comparator 1 output. KBI6 — Keyboard input 6. P0.7 — Port 0 bit 7. High current source. T1 — Timer/counter 1 external count input or overflow output. KBI7 — Keyboard input 7. Port 1: Port 1 is an 8-bit I/O port with a user-configurable output type, except for three pins as noted below. During reset Port 1 latches are configured in the input only mode with the internal pull-up disabled. The operation of the configurable Port 1 pins as inputs and outputs depends upon the port configuration selected. Each of the configurable .


P89LPC9251 UM10336 PIC16F1938


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