3V LVDS Quad CMOS Differential Line Driver
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3 V LVDS Quad CMOS Differential Line Driver ADN4667
FUNCTIONAL BLOCK DIAGRAM
VCC
FEATURES
±15 kV E...
Description
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3 V LVDS Quad CMOS Differential Line Driver ADN4667
FUNCTIONAL BLOCK DIAGRAM
VCC
FEATURES
±15 kV ESD protection on output pins 400 Mbps (200 MHz) switching rates Flow-through pinout simplifies PCB layout 300 ps typical differential skew 400 ps maximum differential skew 1.7 ns maximum propagation delay 3.3 V power supply ±310 mV differential signaling Low power dissipation (10 mW typical) Interoperable with existing 5 V LVDS receivers High impedance on LVDS outputs on power-down Conforms to TIA/EIA-644 LVDS standard Industrial operating temperature range: −40°C to +85°C Available in low profile TSSOP package
ADN4667
DIN1
D1
DOUT1+ DOUT1– DOUT2+ DOUT2– DOUT3+ DOUT3– DOUT4+ DOUT4–
07032-001
DIN2
D2
DIN3
D3
DIN4 EN EN GND
D4
APPLICATIONS
Backplane data transmission Cable data transmission Clock distribution
Figure 1.
GENERAL DESCRIPTION
The ADN4667 is a quad, CMOS, low voltage differential signaling (LVDS) line driver offering data rates of over 400 Mbps (200 MHz) and ultralow power consumption. It features a flow-through pinout for easy PCB layout and separation of input and output signals. The device accepts low voltage TTL/CMOS logic signals and converts them to a differential current output of typically ±3.1 mA for driving a transmission medium such as a twisted pair cable. The transmitted signal develops a differential voltage of typically ±310 mV across a termination resistor at the receiving end. This is converted back to a TTL/CMOS logic l...
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