ICS662-03

DATASHEET HDTV AUDIO/VIDEO CLOCK SOURCE Description www.datasheet4u.com ICS662-03 Features Packaged in 8-pin SOIC Available in Pb (lead) free package HDTV clock input Low phase noise Exact (0 ppm) multiplication ratios Support for 256 and 384 times sampling rate Supports 27 MHz output for video (MPEG) The ICS662-03 provides synchronous clock generation for audio sampling clock rates derived from an HDTV stream. The device uses the latest PLL technology to provide superior phase noise and long term jitter performance. The device also supports a 27 MHz output clock for video MPEG applications from an HDTV reference clock. Please contact ICS if you have a requirement for an input and output frequency not included here. Block Diagram VDD SEL3:0 Control Circuitry PLL Clock Synthesis CLK REF_IN GND IDT™ / ICS™ HDTV AUDIO/VIDEO CLOCK SOURCE 1 ICS662-03 REV E 101807 ICS662-03 HDTV AUDIO/VIDEO CLOCK SOURCE CLOCK SYNTHESIZER Pin Assignment Output Clock Selection Table S3 S2 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 S1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 S0 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 Input Frequency (MHz) 74.175824 74.175824 74.175824 74.175824 74.175824 74.175824 74.175824 74.175824 74.25 74.25 74.25 74.25 74.25 74.25 74.25 74.25 Output Frequency (MHz) 8.192 11.2896 12.288 24.576 16.9344 18.432 36.864 27 8.192 11.2896 12.288 24.576 16.9344 18.432 36.864 27 www.datasheet4u.com 0 REF_IN VDD GND S2 1 2 3 4 8 7 6 5 S0 S3 S1 CLK 0 0 0 0 0 0 0 1 1 8 pin (1...