32-Bit RISC Microprocessor TX19 Family
The TX19 is a family of high-performance 32-bit microprocessors that offers the speed of a 32-bit RISC
solution with the added advantage of a significantly reduced code size of a 16-bit architecture. The instruction set
of the TX19 includes as a subset the 32-bit instructions of the TX39, which is based on the MIPS R3000ATM
architecture. Additionally, the TX19 supports the MIPS16TM Application-Specific Extensions (ASE) for improved
www.DataSheet4U.com The TMP1962 is built on a TX19 core processor and a selection of intelligent peripherals. The TMP1962 is
suitable for low-voltage, low-power applications.
Features of the TMP1962 include the following:
(1) TX19 core processor
1) Two instruction set architecture (ISA) modes: 16-bit ISA for code density and 32-bit ISA for speed
• The 16-bit ISA is object-code compatible with the code-efficient MIPS16TM ASE.
• The 32-bit ISA is object-code compatible with the high-performance TX39 family.
2) Combines high performance with low power consumption.
• High performance
• Single clock cycle execution for most instructions
• 3-operand computational instructions for high instruction throughput
• 5-stage pipeline
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