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MT47H256M8 Dataheets PDF



Part Number MT47H256M8
Manufacturers Micron
Logo Micron
Description (MT47HxxxMxx) DDR2 SDRAM
Datasheet MT47H256M8 DatasheetMT47H256M8 Datasheet (PDF)

2Gb: x4, x8, x16 DDR2 SDRAM Features DDR2 SDRAM MT47H512M4 – 64 Meg x 4 x 8 banks MT47H256M8 – 32 Meg x 8 x 8 banks MT47H128M16 – 16 Meg x 16 x 8 banks Features www.DataSheet4U.com • • • • • • • • • • • • • • • • • Vdd = +1.8V ±0.1V, VddQ = +1.8V ±0.1V JEDEC-standard 1.8V I/O (SSTL_18-compatible) Differential data strobe (DQS, DQS#) option 4n-bit prefetch architecture Duplicate output strobe (RDQS) option for x8 DLL to align DQ and DQS transitions with CK 8 internal banks for concurrent opera.

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2Gb: x4, x8, x16 DDR2 SDRAM Features DDR2 SDRAM MT47H512M4 – 64 Meg x 4 x 8 banks MT47H256M8 – 32 Meg x 8 x 8 banks MT47H128M16 – 16 Meg x 16 x 8 banks Features www.DataSheet4U.com • • • • • • • • • • • • • • • • • Vdd = +1.8V ±0.1V, VddQ = +1.8V ±0.1V JEDEC-standard 1.8V I/O (SSTL_18-compatible) Differential data strobe (DQS, DQS#) option 4n-bit prefetch architecture Duplicate output strobe (RDQS) option for x8 DLL to align DQ and DQS transitions with CK 8 internal banks for concurrent operation Programmable CAS latency (CL) Posted CAS additive latency (AL) WRITE latency = READ latency - 1 tCK Programmable burst lengths: 4 or 8 Adjustable data-output drive strength 64ms, 8,192-cycle refresh On-die termination (ODT) Industrial temperature (IT) option RoHS compliant Supports JEDEC clock jitter specification • Configuration – 512 Meg x 4 (64 Meg x 4 x 8 banks) – 256 Meg x 8 (32 Meg x 8 x 8 banks) – 128 Meg x 16 (16 Meg x 16 x 8 banks) • FBGA package (Pb-free) – x16 – 84-ball FBGA (11.5mm x 14mm) Rev. A • FBGA package (Pb-free) – x4, x8 – 60-ball FBGA (11.5mm x 14mm) Rev. A • Timing – cycle time – 3.0ns @ CL = 4 (DDR2-667) – 3.0ns @ CL = 5 (DDR2-667) – 3.75ns @ CL = 4 (DDR2-533) – 5.0ns @ CL = 3 (DDR2-400) • Self refresh – Standard – Low-power • Operating temperature – Commercial (0°C ≤ TC ≤ 85°C) – Industrial (–40°C ≤ TC ≤ 95°C; –40°C ≤ TA ≤ 85°C) Revision • Note: Options1 Marking 512M4 256M8 128M16 HG HG -3E -3 -37E -5E None L None IT :A 1. Not all options listed can be combined to define an offered product. Use the Part Catalog Search on www.micron.com for product offerings and availability. Table 1: Key Timing Parameters Data Rate (MHz) Speed Grade -3E -3 -37E -5E CL = 3 400 400 400 400 CL = 4 667 533 533 400 CL = 5 667 667 n/a n/a tRCD (ns) tRP (ns) tRC (ns) 12 15 15 15 12 15 15 15 54 55 55 55 PDF: 09005aef824f87b6 Rev. B 9/08 EN 1 Products and specifications discussed herein are subject to change by Micron without notice. Micron Technology, Inc. reserves the right to change products or specifications without notice. © 2006 Micron Technology, Inc. All rights reserved. 2Gb: x4, x8, x16 DDR2 SDRAM Features Table 2: Addressing Parameter Configuration Refresh count Row address Bank address www.DataSheet4U.com 512 Meg x 4 64 Meg x 4 x 8 banks 8K A[14:0] (32K) BA[2:0] (8) A[11, 9:0] (2K) 256 Meg x 8 32 Meg x 8 x 8 banks 8K A[14:0] (32K) BA[2:0] (8) A[9:0] (1K) 128 Meg x 16 16 Meg x 16 x 8 banks 8K A[13:0] (16K) BA[2:0] (8) A[9:0] (1K) Column address Part Numbers Figure 1: 2Gb DDR2 Part Numbers Example Part Number: MT47H256M8HG-37E :A MT47H Configuration Package Speed : Revision { Configuration 512 Meg x 4 256 Meg x 8 128 Meg x 16 Package 84-Ball 11.5mm x 14mm FBGA 60-Ball 11.5mm x 14mm FBGA HG HG -5E -37E -3 -3E 512M4 256M8 128M16 L Low-Power IT Industrial Temperature Speed Grade tCK = 5ns, CL = 3 tCK = 3.75ns, CL = 4 tCK = 3ns, CL = 5 tCK = 3ns, CL = 4 :A Revision Note: 1. Not all speeds and configurations are available. FBGA Part Number System Due to space limitations, FBGA-packaged components have an abbreviated part marking that is different from the part number. For a quick conversion of an FBGA code, see the FBGA Part Marking Decoder on Micron’s Web site: http://www.micron.com. PDF: 09005aef824f87b6 Rev. B 9/08 EN 2 Micron Technology, Inc. reserves the right to change products or specifications without notice. © 2006 Micron Technology, Inc. All rights reserved. 2Gb: x4, x8, x16 DDR2 SDRAM State Diagram .................................................................................................................................................. 8 Functional Description ..................................................................................................................................... 9 Industrial Temperature ................................................................................................................................ 9 Automotive Temperature ........................................................................................................................... 10 General Notes ............................................................................................................................................ 10 Functional Block Diagrams ............................................................................................................................. 11 Ball Assignments and Descriptions ................................................................................................................. 14 Packaging ...................................................................................................................................................... 20 Package Dimensions .................................................................................................................................. 20 FBGA Package Capacitance ...............................................................................


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