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STF15NM65N-STI15NM65N-STW15NM65N STB15NM65N-STP15NM65N
N-channel 650V - 0.25Ω - 15.5A - TO-220/FP - D2/I2PAK - TO-247 Second generation MDmesh™ Power MOSFET
Features
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VDSS RDS(on) Max (@Tjmax) 710 V 710 V 710 V 710 V 710 V < 0.27 Ω < 0.27 Ω < 0.27 Ω < 0.27 Ω < 0.27 Ω
ID
3
STB15NM65N STF15NM65N STI15NM65N STP15NM65N STW15NM65N
15.5 A 15.5 A(1) 15.5 A 15.5 A 15.5 A
1
2
3 12
TO-220
3 1 2
I²PAK
TO-220FP
3 1
2 3
1. Limited only by maximum temperature allowed ■ ■ ■
100% avalanche tested Low input capacitance and gate charge Low gate input resistance
D²PAK
1
TO-247
Figure 1.
Internal schematic diagram
Application
■
Switching applications
Description
This series of devices implements the second generation of MDmesh™ Technology. This revolutionary Power MOSFET associates a new vertical structure to the Company’s strip layout to yield one of the world’s lowest on-resistance and gate charge. It is therefore suitable for the most demanding high efficiency converters
Table 1.
Device summary
Order codes STI15NM65N Marking 15NM65N 15NM65N 15NM65N 15NM65N 15NM65N Package I²PAK TO-220FP TO-220 D²PAK TO-247 Packaging Tube Tube Tube Tape & reel Tube
STF15NM65N STP15NM65N STB15NM65NT4 STW15NM65N
September 2007
Rev 1
1/18
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Contents
STB15NM65N-STI15NM65N-STF15NM65N-STP/W15NM65N
Contents
1 2 Electrical ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
2.1 Electrical characteristics (curves) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
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3
Test circuit
................................................ 9
4 5 6
Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 Packaging mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
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STB15NM65N-STI15NM65N-STF15NM65N-STP/W15NM65N
Electrical ratings
1
Electrical ratings
Table 2.
Symbol
Absolute maximum ratings
Value Parameter TO-220/I²PAK TO-220FP D²PAK/TO-247 650 ± 25 15.5 10 62 150 15 --55 to 150 2500 15.5(1) 10(1) 62(1) 35 Unit
VDS
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Drain-source voltage (VGS=0) Gate-source voltage Drain current (continuous) at TC = 25°C Drain current (continuous) at TC = 100°C Drain current (pulsed) Total dissipation at TC = 25°C Peak diode recovery voltage slope Insulation withstand voltage (RMS) from all three leads to external heat sink (t=1s;TC=25°C) Operating junction temperature Storage temperature
V V A A A W V/ns V °C
VGS ID ID IDM (2) PTOT dv/dt (3) VISO Tj Tstg
1. Limited only by maximum temperature allowed 2. Pulse width limited by safe operating area 3. ISD ≤15.5A, di/dt ≤400A/µs, VDD = 80% V(BR)DSS
Table 3.
Symbol
Thermal data
Value Parameter TO-220/I²PAK TO-220FP D²PAK/TO-247 0.83 62.5 300 3.6 Unit
Rthj-case Rthj-amb Tl
Thermal resistance junction-case Max Thermal resistance junction-amb Max Maximum lead temperature for soldering purpose
°C/W °C/W °C
Table 4.
Symbol IAS EAS
Avalanche characteristics
Parameter Avalanche current, repetitive or not-repetitive (pulse width limited by Tj max) Single pulse avalanche energy (starting Tj=25 °C, ID= IAS, VDD= 50 V) Max value 4 400 Unit A mJ
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Electrical characteristics
STB15NM65N-STI15NM65N-STF15NM65N-STP/W15NM65N
2
Electrical characteristics
(TCASE=25°C unless otherwise specified) Table 5.
Symbol V(BR)DSS
On/off states
Parameter Drain-source breakdown voltage Drain source voltage slope Zero gate voltage drain current (VGS = 0) Gate-body leakage current (VDS = 0) Gate threshold voltage Static drain-source on resistance Test conditions ID = 1 mA, VGS = 0 Vdd=520 V, Id=15.5 A, Vgs=10 V VDS = Max rating VDS = Max rating, @125 °C VGS = ± 20 V VDS = VGS, ID = 250 µA VGS = 10 V, ID = 7.75 A 2 3 0.25 Min. 650 30 1 100 ±100 4 0.27 Typ. Max. Unit V V/ns µA µA nA V Ω
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dv/dt (1) IDSS IGSS VGS(th) RDS(on)
1. Characteristics value at turn off on inductive load
Table 6.
Symbol gfs (1) Ciss Coss Crss Coss eq.(2) Qg Qgs Qgd
Dynamic
Parameter Forward transconductance Input capacitance Output capacitance Reverse transfer capacitance Equivalent output capacitance Total gate charge Gate-source charge Gate-drain charge Test conditions VDS=15 V, ID =7.75 A VDS = 50 V, f = 1 MHz, VGS = 0 VGS = 0 V, VDS = 0V to 520 V VDD = 520 V, ID = 15.5 A, VGS = 10 V, (see Figure 19) Min. Typ. 15 1900 110 10 230 55 9 30 Max. Unit S pF pF pF pF nC nC nC
1. Pulsed: pulse duration = 300µs, duty cycle 1.5% 2. Coss eq. is defined as a constant equivalent capacitance giving the same charging time as Coss when VDS increases from 0 to 80% VDSS
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STB15NM65N-STI15NM65N-STF15NM65N-STP/W15NM65N
Electrical characteristics
Table 7.
Symbol td(on) tr td(off) tf
Switching times
Paramet.