AD9626

12-Bit, 170 MSPS/210 MSPS/250 MSPS, 1.8 V Analog-to-Digital Converter AD9626 FEATURES SNR = 64.8 dBFS @ fIN up to 70 MHz @ 250 MSPS ENOB of 10.5 @ fIN up to 70 MHz @ 250 MSPS (−1.0 dBFS) SFDR = 80 dBc @ fIN up to 70 MHz @ 250 MSPS (−1.0 dBFS) Excellent linearity DNL = ±0.3 LSB typical INL = ±0.7 LSB typical CMOS outputs www.DataSheet4U.com Single data port at up to 250 MHz Interleaved dual port @ ½ sample rate up to 125 MHz 700 MHz full power analog bandwidth On-chip reference, no external decoupling required Integrated input buffer and track-and-hold Low power dissipation 272 mW @ 170 MSPS 364 mW @ 250 MSPS Programmable input voltage range 1.0 V to 1.5 V, 1.25 V nominal 1.8 V analog and digital supply operation Selectable output data format (offset binary, twos complement, Gray code) Clock duty cycle stabilizer Integrated data capture clock APPLICATIONS Wireless and wired broadband communications Cable reverse path Communications test equipment Radar and satellite subsystems Power amplifier linearization FUNCTIONAL BLOCK DIAGRAM RBIAS PWDN AGND AVDD (1.8V) REFERENCE CML VIN+ VIN– TRACK-AND-HOLD ADC 12-BIT CORE CLK+ CLK– CLOCK MANAGEMENT 12 AD9626 DRVDD DRGND OUTPUT 12 STAGING LVDS Dx11 TO Dx0 OVRA OVRB SERIAL PORT DCO+ 07099-001 DCO– RESET SCLK SDIO CSB Figure 1. GENERAL DESCRIPTION The AD9626 is a 12-bit monolithic sampling analog-to-digital converter optimized for high performance, low power, and ease of use. The product operates at up to a 250 MSPS conversion ra...