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ASM4SSTVF32852

Alliance Semiconductor Corporation
Part Number ASM4SSTVF32852
Manufacturer Alliance Semiconductor Corporation
Description DDR 24-Bit to 48-Bit Registered Buffer
Published Nov 18, 2008
Detailed Description August 2004 rev 2.0 DDR 24-Bit to 48-Bit Registered Buffer ASM4SSTVF32852 Features   Differential clock signals. Sup...
Datasheet PDF File ASM4SSTVF32852 PDF File

ASM4SSTVF32852
ASM4SSTVF32852

Overview
August 2004 rev 2.
0 DDR 24-Bit to 48-Bit Registered Buffer ASM4SSTVF32852 Features   Differential clock signals.
Supports SSTL_2 class II specifications on inputs and outputs.
Low voltage operation.
 VDD = 2.
3V to 2.
7V.
To ensure that outputs are at a defined logic state before a stable clock has been supplied, RESETB must be held at a logic “Low” level during power-up.
In the DDR DIMM application, RESETB is specified to be asynchronous with respect to CLK/CLKB.
Therefore, no timing relationship can be guaranteed between the two signals.
When entering a low-power standby state, the register will be cleared and the outputs will be driven to a logic “Low” level quickly relative to the ti...


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