MPC565

MOTOROLA MPC565PB/D Rev. 2, 5 December 2001 SEMICONDUCTOR PRODUCT BRIEF MPC565/MPC566 Product Brief MPC565/MPC566 RISC MCU with Code Compression Option Features The MPC565 / MPC566 key features are as follows. The information inside boxes are optional features. www.DataSheet4U.com 40 MHz / 56 MHz operation 56 MHz operation is available as an option. — -40° – 125 °C ambient temperature — 2.6 V ± 0.1 V external bus External bus is compatible with external memory devices operating from 2.5 V to 3.4 V. Extended voltage range (2.7 – 3.4 V) degrades data drive timing by 1.1 ns on date writes. — 2.6 ± 0.1 V internal logic — 5-V I/O (5.0 ± 0.25 V) High performance RISC CPU system — High performance core Single issue integer core Instruction set compatible with PowerPC instruction set architecture Precise exception model Floating point Code compression supported on the MPC566 — Compression reduces usage of internal or external flash memory — Compression optimized for automotive (non-cached) applications — New compression scheme increases compression performance to 40% – 50% compression — 4-Kbyte static DECRAM can be used as memory if Compression is not used. — General-purpose I/O support On address (24) and data (32) pins 16 GPIO in MIOS14 Many peripheral pins can be used as GPIO when not used as primary functions 2.6-V outputs on external bus pins Extensive system development support — On-chip watchpoints and breakpoints — Program flow tracking — Ba...