DatasheetsPDF.com

PLL102-03

PhaseLink Corporation

Low Skew Output Buffer


Description
PLL102-03 Low Skew Output Buffer FEATURES Frequency range 75 ~ 180MHz. Internal phase locked loop will allow spread spectrum modulation on reference clock to pass to the outputs (up to 100kHz SST modulation). Zero input - output delay. Less than 700 ps device - device skew. Less than 250 ps skew between outputs. www.DataSheet4U.com Less than 150 ps c...



PhaseLink Corporation

PLL102-03

File Download Download PLL102-03 Datasheet


Similar Datasheet


@ 2014 :: Datasheetspdf.com :: Semiconductors datasheet search & download site. (Privacy Policy & Contact)