80C85AHRS

E2O0009-27-X2 ¡ Semiconductor MSM80C85AHRS/GS/JS ¡ Semiconductor 8-Bit CMOS MICROPROCESSOR This version: Jan. 1998 MSM80C85AHRS/GS/JS Previous version: Aug. 1996 GENRAL DESCRIPTION The MSM80C85AH is a complete 8-bit parallel; central processor implemented in silicon gate C-MOS technology and compatible with MSM80C85A. It is designed with higher processing speed (max.5 MHz) and lower power consumption compared with MSM80C85A and power down mode is provided, thereby offering a high level of system integration. www.DataSheet4U.com The MSM80C85AH uses a multiplexed address/data bus. The address is split between the 8bit address bus and the 8-bit data bus. The on-chip address latch : of a MSM81C55-5 memory product allows a direct interface with the MSM80C85AH. FEATURES Power down mode (HALT-HOLD) Low Power Dissipation: 50mW(Typ) Single + 3 to + 6 V Power Supply –40 to + 85°C, Operating Temperature Compatible with MSM80C85A 0.8 ms instruction Cycle (VCC = 5V) On-Chip Clock Generator (with External Crystal) On-Chip System Controller; Advanced Cycle Status Information Available for Large System Control Bug operation in MSM80C85AH is fixed Four Vectored interrupt (One is non-maskable) Plus the 8080A-compatible interrupt. Serial, In/Serial Out Port Decimal, Binary and Double Precision Arithmetic Addressing Capability to 64K Bytes of Memory TTL Compatible 40-pin Plastic DIP(DIP40-P-600-2.54): (Product name: MSM80C85AHRS) 44-pin Plastic QFJ(QFJ44-P-S65...