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CXD8979R(1/3) IL08D
C-MOS DIGITAL MULTIPLEX ENCODER
—TOP VIEW— 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33
63 64 YCASEL YCBSEL RECSEL AUX1 CNFASEL CNFBSEL FEEN AUX2 A1SEL A3SEL A5SEL A7SEL AUX3 B1SEL B3SEL B5SEL B7SEL PEDATA PECK MPX ODIVCK OSTP CK13 CK13X 19 22 34 36 38 46 44
NC NC
NC
NC GND NC NC NC
NC
NC
1
GND
49 50 51 52 53 www.DataSheet4U.com 54 55 56 57 58 59 60 61 62 63 64
NC NC NC
GND VDD NC
NC NC NC NC NC NC NC VDD GND NC NC NC NC NC NC
32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17
2 3 4 5 6 7 8 9 11 12 13 14 15 16
55 56
DIVSEL DLENSEL EXTSTP STARTSEL CK51 XOEMPXD XRST
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16
61 54 60 51 62
53
TEST
CXD8979R(2/3) PIN NO. PIN NO. 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 PIN NO. 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 PIN NO. 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64
I/O
SIGNAL RECSEL AUX1 CNFASEL CNFBSEL FEEN AUX2 A1SEL A3SEL A5SEL GND A7SEL AUX3 B1SEL B3SEL B5SEL B7SEL
I/O — — O — — O — — — — — — — — — —
SIGNAL NC NC PEDATA NC NC PECK NC NC GND VDD NC NC NC NC NC NC
I/O — O — O — O — — — — — O — O — —
SIGNAL NC MPX NC ODIVCK NC OSTP NC NC NC GND NC CK13X NC CK13 NC NC
I/O — — I — I I I I — — — I I I I I
SIGNAL NC NC XOEMPXD NC TEST STARTSEL DIVSEL DLENSEL GND VDD NC CK51 EXTSTP XRST YCASEL YCBSEL
1 I 2 I 3 I 4 I 5 I 6 I 7 I 8 I 9 I www.DataSheet4U.com 10 — 11 I 12 I 13 I 14 I 15 I 16 I
INPUT A1SEL A3SEL A5SEL A7SEL AUX1 - AUX3 B1SEL B3SEL B5SEL B7SEL CK51 CNFASEL, CNFBSEL DIVSEL DLENSEL EXTSTP FEEN RECSEL STARTSEL TEST XOEMPXD XRST YCASEL, YCBSEL OUTPUT CK13 CK13X MPX ODIVCK OSTP PECK PEDATA
; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ;
A1/A2 PB HEAD SELECT A3/A4 PB HEAD SELECT A5/A6 PB HEAD SELECT A7/A8 PB HEAD SELECT MPX DATA AUXILIARY B1/B2 PB HEAD SELECT B3/B4 PB HEAD SELECT B5/B6 PB HEAD SELECT B7/B8 PB HEAD SELECT 51.39 MHz REFERENCE CLOCK CNF SYSTEM SELECT MPX CLOCK DIVIDING RATIO SELECT (H : 1/4, L : 1/2) MPX DATA LENGTH SELECT (H : 17-BIT, L : 8-BIT) MPX DATA SYNC SYSTEM SELECT (H : INT, L : EXT) FLYING ERASE HEAD CONTROL REC SYSTEM SELECT MPX DATA EXTERNAL SYNC-LOCK TEST PE DATA AND PECK CONTROL SYSTEM RESET ANALOG BETACAM PB Y/C HEAD SELECT
; ; ; ; ; ; ;
12.8 MHz CLOCK PHASE INVERTED 12.8 MHz CLOCK BEFORE PRE-CODED MPX DATA DOWN COUNTED (1/2 OR 1/4) MPX CLOCK TIMING PULSE 25.7 MHz MPX CLOCK PRE-CODED MPX DATA
CXD8979R(3/3)
XOEMPXD YCASEL YCBSEL RECSEL AUX1 CNFASEL CNFBSEL FEEN AUX2 A1SEL A3SEL www.DataSheet4U.com A5SEL A7SEL AUX3 B1SEL B3SEL B5SEL B7SEL 51 63 64 1 2 3 4 5
7 8 9 11 12 13 14 15 16
LATCH
6
HEAD PATTERN
17
PRE-CODE PARALLEL TO SERIAL CONVERTER
19
PEDATA
34
PARITY
MPX
TAIL PATTERN
36
ODIVCK
DIVSEL
55
1/2 OR 1/4 DIVIDER 8-BIT OR 17-BIT SELECTOR EXT/INT SELECTOR 1/2 DIVIDER 1/2 DIVIDER
22
PECK
DLENSEL
56
EXTSTP STARTSEL
61 54
38
OSTP
CK51
60
46 44
CK13 CK13X
XRST
62
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