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SST29LE010 Dataheets PDF



Part Number SST29LE010
Manufacturers SST
Logo SST
Description 1 Mbit (128K x8) Page-Mode EEPROM
Datasheet SST29LE010 DatasheetSST29LE010 Datasheet (PDF)

1 Mbit (128K x8) Page-Mode EEPROM SST29EE010 / SST29LE010 / SST29VE010 SST29EE010 / SST29LE010 / SST29VE0101Mb Page-Mode flash memories Data Sheet FEATURES: • Single Voltage Read and Write Operations – 5.0V-only for SST29EE010 – 3.0-3.6V for SST29LE010 – 2.7-3.6V for SST29VE010 • Superior Reliability – Endurance: 100,000 Cycles (typical) – Greater than 100 years Data Retention • Low Power Consumption – Active Current: 20 mA (typical) for 5V and 10 mA www.DataSheet4U.com (typical) for 3.0/2.7V .

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1 Mbit (128K x8) Page-Mode EEPROM SST29EE010 / SST29LE010 / SST29VE010 SST29EE010 / SST29LE010 / SST29VE0101Mb Page-Mode flash memories Data Sheet FEATURES: • Single Voltage Read and Write Operations – 5.0V-only for SST29EE010 – 3.0-3.6V for SST29LE010 – 2.7-3.6V for SST29VE010 • Superior Reliability – Endurance: 100,000 Cycles (typical) – Greater than 100 years Data Retention • Low Power Consumption – Active Current: 20 mA (typical) for 5V and 10 mA www.DataSheet4U.com (typical) for 3.0/2.7V – Standby Current: 10 µA (typical) • Fast Page-Write Operation – 128 Bytes per Page, 1024 Pages – Page-Write Cycle: 5 ms (typical) – Complete Memory Rewrite: 5 sec (typical) – Effective Byte-Write Cycle Time: 39 µs (typical) • Fast Read Access Time – 5.0V-only operation: 70 and 90 ns – 3.0-3.6V operation: 150 and 200 ns – 2.7-3.6V operation: 200 and 250 ns • Latched Address and Data • Automatic Write Timing – Internal VPP Generation • End of Write Detection – Toggle Bit – Data# Polling • Hardware and Software Data Protection • Product Identification can be accessed via Software Operation • TTL I/O Compatibility • JEDEC Standard – Flash EEPROM Pinouts and command sets • Packages Available – 32-lead PLCC – 32-lead TSOP (8mm x 14mm, 8mm x 20mm) – 32-pin PDIP PRODUCT DESCRIPTION The SST29EE/LE/VE010 are 128K x8 CMOS Page-Write EEPROMs manufactured with SST’s proprietary, high performance CMOS SuperFlash technology. The split-gate cell design and thick oxide tunneling injector attain better reliability and manufacturability compared with alternate approaches. The SST29EE/LE/VE010 write with a single power supply. Internal Erase/Program is transparent to the user. The SST29EE/LE/VE010 conform to JEDEC standard pinouts for byte-wide memories. Featuring high performance Page-Write, the SST29EE/LE/ VE010 provide a typical Byte-Write time of 39 µsec. The entire memory, i.e., 128 KBytes, can be written page-bypage in as little as 5 seconds, when using interface features such as Toggle Bit or Data# Polling to indicate the completion of a Write cycle. To protect against inadvertent write, the SST29EE/LE/VE010 have on-chip hardware and Software Data Protection schemes. Designed, manufactured, and tested for a wide spectrum of applications, the SST29EE/LE/VE010 are offered with a guaranteed PageWrite endurance of 10,000 cycles. Data retention is rated at greater than 100 years. The SST29EE/LE/VE010 are suited for applications that require convenient and economical updating of program, configuration, or data memory. For all system applications, the SST29EE/LE/VE010 significantly improve performance and reliability, while lowering power consumption. The SST29EE/LE/VE010 improve flexibility while lowering the cost for program, data, and configuration storage applications. To meet high density, surface mount requirements, the SST29EE/LE/VE010 are offered in 32-lead PLCC and 32lead TSOP packages. A 600-mil, 32-pin PDIP package is also available. See Figures 1, 2, and 3 for pinouts. Device Operation The SST Page-Mode EEPROM offers in-circuit electrical write capability. The SST29EE/LE/VE010 does not require separate Erase and Program operations. The internally timed write cycle executes both erase and program transparently to the user. The SST29EE/LE/VE010 have industry standard optional Software Data Protection, which SST recommends always to be enabled. The SST29EE/LE/ VE010 are compatible with industry standard EEPROM pinouts and functionality. ©2001 Silicon Storage Technology, Inc. S71061-07-000 6/01 304 1 The SST logo and SuperFlash are registered trademarks of Silicon Storage Technology, Inc. SSF is a trademark of Silicon Storage Technology, Inc. These specifications are subject to change without notice. 1 Mbit Page-Mode EEPROM SST29EE010 / SST29LE010 / SST29VE010 Data Sheet Read The Read operations of the SST29EE/LE/VE010 are controlled by CE# and OE#, both have to be low for the system to obtain data from the outputs. CE# is used for device selection. When CE# is high, the chip is deselected and only standby power is consumed. OE# is the output control and is used to gate data from the output pins. The data bus is in high impedance state when either CE# or OE# is high. Refer to the read cycle timing diagram for further details (Figure 4). www.DataSheet4U.com consists of a specific three-byte load sequence that allows writing to the selected page and will leave the SST29EE/ LE/VE010 protected at the end of the Page-Write. The page load cycle consists of loading 1 to 128 bytes of data into the page buffer. The internal write cycle consists of the TBLCO time-out and the write timer operation. During the Write operation, the only valid reads are Data# Polling and Toggle Bit. The Page-Write operation allows the loading of up to 128 bytes of data into the page buffer of the SST29EE/LE/ VE010 before the initiation of the internal write cycle. During the internal write cycle, all the data in the page buffer is written simultaneous.


2SA103 SST29LE010 SST29VE010


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