IDTRC5000

MULTI-ISSUE 64-BIT MICROPROCESSOR Integrate d Device Technology, Inc. IDT RC5000 FEATURES Dual issue super-scalar execution core, executing at high-frequency - 250 MHz frequency - Dual issue floating-point ALU operations with other instruction classes - Traditional 5-stage pipeline, minimizes load and branch latencies - Single cycle repeat rate for most floating point ALU operations High level of performance for a variety of applications www.DataSheet4U.com - High-performance 64-bit integer unit achieves 330 dhrystone MIPS (dhrystone 2.1) - Ultra high-performance floating-point accelerator, directly implementing single- and double-precision operations achieves 500mflops - Extremely large on-chip primary caches - On-chip secondary cache controller Large, efficient on-chip caches - 32KB Instruction Cache, 32KB Data Cache - 2-set associative in each cache - Virtually indexed and physically tagged to minimize cache flushes - Write-back and write-through selectable on a per page basis - Critical word first cache miss processing - Supports back-to-back loads and stores in any combination at full pipeline rate High-performance memory system - Large primary caches integrated on-chip - Secondary cache control interface on-chip - High-frequency 64-bit bus interface runs up to 100MHz - Aggregate bandwidth of on-chip caches, system interface of 5GB/s - High-performance write protocols for graphics and data communications MIPS-IV 64-bit ISA for improved computatio...