CY62128DV30

CY62128DV30 1-Mb (128K x 8) Static RAM Features Very high speed: 55 and 70 ns Wide voltage range: 2.2V to 3.6V Pin compatible with CY62128V Ultra-low active power www.DataSheet4U.com — Typical active current: 0.85 mA @ f = 1 MHz — Typical active current: 5 mA @ f = fMAX also has an automatic power-down feature that significantly reduces power consumption by 90% when addresses are not toggling. The device can be put into standby mode reducing power consumption by more than 99% when deselected Chip Enable 1 (CE1) HIGH or Chip Enable 2 (CE2) LOW. The input/output pins (I/O0 through I/O7) are placed in a high-impedance state when: deselected Chip Enable 1 (CE1) HIGH or Chip Enable 2 (CE2) LOW, outputs are disabled (OE HIGH), or during a write operation (Chip Enable 1 (CE1) LOW and Chip Enable 2 (CE2) HIGH and Write Enable (WE) LOW). Writing to the device is accomplished by taking Chip Enable 1 (CE1) LOW with Chip Enable 2 (CE2) HIGH and Write Enable (WE) LOW. Data on the eight I/O pins is then written into the location specified on the Address pin (A0 through A16). Reading from the device is accomplished by taking Chip Enable 1 (CE1) LOW with Chip Enable 2 (CE2) HIGH and Output Enable (OE) LOW while forcing the Write Enable (WE) HIGH. Under these conditions, the contents of the memory location specified by the address pins will appear on the I/O pins. The eight input/output pins (I/Oo through I/O7) are placed in a high-impedance state when the device is deselected (CE1...