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CY7C1410V18 Dataheets PDF



Part Number CY7C1410V18
Manufacturers Cypress Semiconductor
Logo Cypress Semiconductor
Description (CY7C14xxV18) SRAM 2-Word Burst Architecture
Datasheet CY7C1410V18 DatasheetCY7C1410V18 Datasheet (PDF)

PRELIMINARY CY7C1410V18 CY7C1425V18 CY7C1412V18 CY7C1414V18 36-Mbit QDR-II™ SRAM 2-Word Burst Architecture Features • Separate Independent Read and Write data ports — Supports concurrent transactions • 200-MHz clock for high bandwidth • 2-Word Burst on all accesses • Double Data Rate (DDR) interfaces on both Read and Write ports (data transferred at 400 MHz) @ 200 MHz www.DataSheet4U.com • Two input clocks (K and K) for precise DDR timing — SRAM uses rising edges only • Two output clocks (C an.

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