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IS61NVVP25672

ISSI
Part Number IS61NVVP25672
Manufacturer ISSI
Description (IS61NVVP25672 / IS61NVVP51236) STATE BUS SRAM
Published Jul 12, 2008
Detailed Description IS61NVVP25672 IS61NVVP51236 256K x 72 and 512K x 36, 18Mb PIPELINE 'NO WAIT' STATE BUS SRAM FEATURES • 100 percent bus u...
Datasheet PDF File IS61NVVP25672 PDF File

IS61NVVP25672
IS61NVVP25672

Overview
IS61NVVP25672 IS61NVVP51236 256K x 72 and 512K x 36, 18Mb PIPELINE 'NO WAIT' STATE BUS SRAM FEATURES • 100 percent bus utilization • No wait cycles between Read and Write • Internal self-timed write cycle com • Individual ISSI ADVANCE INFORMATION JULY 2002 DESCRIPTION ® Byte Write Control • Single R/W (Read/Write) control pin • Clock controlled, registered address, data and control • Interleaved or linear burst sequence control using MODE input • Power Down mode • Common data inputs and data outputs • CKE pin to enable clock and suspend operation • JEDEC 119-ball PBGA (x36) and 209-ball (x72) PBGA packages • Single +1.
8V (± 5%) power supply • JTAG Boundary Scan • Industri...


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