IS61NVP51236 IS61NVP10018
512K x 36 and 1M x 18 PIPELINE 'NO WAIT' STATE BUS SRAM
FEATURES
100 percent bus utilization No wait cycles between Read and Write Internal self-timed write cycle www.DataSheet4U.com Individual Byte Write Control Single R/W (Read/Write) control pin Clock controlled, registered address, data and control Interleaved or l...
