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HDSP2001LP Dataheets PDF



Part Number HDSP2001LP
Manufacturers Infineon Technologies
Logo Infineon Technologies
Description 4 Character 5x7 Dot Matrix Series Input ALphanumeric Display
Datasheet HDSP2001LP DatasheetHDSP2001LP Datasheet (PDF)

HDSP2000LP YELLOW HDSP2001LP HIGH EFFICIENCY RED HDSP2002LP GREEN HDSP2003LP RED 0.150" 4-Character 5 x 7 Dot Matrix Serial Input Alphanumeric Display Dimensions in inches (mm) .083 (2.11) .175 (4.44) ±.005 (.13) .200 (5.08) .012 (.3) ±.002 (.05) .146 (3.71) .350 (8.89) .300 (7.62) ±.010 (.25) .699 (17.75) max. Part No. .200 (5.08) Pin 1 Indicator HDSP2000LP YYWW OSRAM .150 (3.81) EIA Date Code Luminous Intensity Code or Color Code for Yellow Z .170 (4.32) FEATURES • Four 0.150" Dot Matr.

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HDSP2000LP YELLOW HDSP2001LP HIGH EFFICIENCY RED HDSP2002LP GREEN HDSP2003LP RED 0.150" 4-Character 5 x 7 Dot Matrix Serial Input Alphanumeric Display Dimensions in inches (mm) .083 (2.11) .175 (4.44) ±.005 (.13) .200 (5.08) .012 (.3) ±.002 (.05) .146 (3.71) .350 (8.89) .300 (7.62) ±.010 (.25) .699 (17.75) max. Part No. .200 (5.08) Pin 1 Indicator HDSP2000LP YYWW OSRAM .150 (3.81) EIA Date Code Luminous Intensity Code or Color Code for Yellow Z .170 (4.32) FEATURES • Four 0.150" Dot Matrix Characters • Four Colors: Red, Yellow, High Efficiency Red, Green • Wide Viewing Angle: X Axis +50°, Y Axis +75° • Built-in CMOS Shift Registers with Constant Current LED Row Drivers • Custom Fonts from Shift Registers • Easily Cascaded for Multiple Displays • TTL Compatible • End Stackable • Extended Operating Temperature Range: –40°C to + 85°C • Categorized for Luminous Intensity • All Displays Color Matched • Compact Plastic Package • 100% Burned-in and Tested .100 (2.54) ±.005 (.13) non-cum.10 pl. .020 (.51) ±.003 (.08) 12 pl. 3 4 5 6 1 2 12 11 10 9 8 7 Tolerance: ±.015 (.38) Pin 1 2 3 4 5 6 7 8 9 10 11 12 Function Column 1 Column 2 Column 3 Column 4 Column 5 No Connection Data Out VB VCC Clock Ground Data In DESCRIPTION The HDSP200XLP are four digit 5 x 7 dot matrix serial input alphanumeric displays. The displays are available in red, yellow, high efficiency red, or bright green. The package is a standard twelve-pin DIP with a flat plastic lens. The display can be stacked horizontally or vertically to form messages of any length. The HDSP200XLP has two fourteen-bit CMOS shift registers with built-in row drivers. These shift registers drive twenty-eight rows and enable the design of customized fonts. Cascading multiple displays is possible because of the Data In and Data Out pins. Data In and Out are easily input with the clock signal and displayed in parallel on the row drivers. Data Out represents the output of the 7th bit of digit number four shift register The shift register is level triggered. The like columns of each character in a display cluster are tied to a single pin (see Block Diagram). High true data in the shift register enables the output current mirror driver stage associated with each row of LEDs in the 5 x 7 diode array. See Appnote 44 at www.infineon.com/opto.  2000 Infineon Technologies Corp. • Optoelectronics Division • San Jose, CA www.infineon.com/opto • 1-888-Infineon (1-888-463-4636) OSRAM Opto Semiconductors GmbH & Co. OHG • Regensburg, Germany www.osram-os.com • +49-941-202-7178 1 April 4, 2000-11 DESCRIPTION (continued) The TTL compatible VB input may either be tied to VCC for maximum display intensity or pulse width modulated to achieve intensity control and reduce power consumption. In the normal mode of operation, input data for digit four, column one is loaded into the seven on-board shift register locations one through seven. Column one data for digits 3, 2, and 1 is shifted into the display shift register locations. Then column one input is enabled for an appropriate period of time, T. A similar process is repeated for columns 2, 3, 4, and 5. If the decode time and load data time into the shift register is t, then with five columns, each column of the display is operating at a duty factor of: T DF = ------------------5 (T + t ) T+t, allotted to each display column, is generally chosen to provide the maximum duty factor consistent with the minimum refresh rate necessary to achieve a flicker free display. For most strobed display systems, each column of the display should be refreshed (turned on) at a minimum rate of 100 times per second. With columns to be addressed, this refresh rate then gives a value for the time T+t of: 1⁄ [5 x (100)] =2.0 msec. If the device is operated at 5.0 MHz clock rate maximum, it is possible to maintain t


P2003EVG HDSP2001LP FSF10A60B


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