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ASM5I2308A

Alliance Semiconductor

3.3 V Zero Delay Buffer

September 2005 rev 1.4 3.3V Zero-Delay Buffer General Features • Zero input - output propagation delay, adjustable by ca...


Alliance Semiconductor

ASM5I2308A

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Description
September 2005 rev 1.4 3.3V Zero-Delay Buffer General Features Zero input - output propagation delay, adjustable by capacitive load on FBK input. Multiple configurations - Refer “ASM5P2308A Configurations “ Table. www.DataSheet4U.com Input frequency range: 15MHz to 133MHz ASM5P2308A allows the input clock to be directly applied to the outputs for chip and system testing purposes. Multiple ASM5P2308A devices can accept the same input clock and distribute it. In this case the skew between the outputs of the two devices is guaranteed to be less than 700pS. Multiple low-skew outputs. Output-output skew less than 200pS. Device-device skew less than 700pS. The ASM5P2308A is available in five different Two banks of four outputs, tri-stateable by two select inputs. configurations(Refer “ASM5P2308A Configurations” Table). The ASM5P2308A-1 is the base part, where the output frequencies equal the reference if there is no counter in the feedback path. The ASM5P2308A-1H is the high-drive version of the -1 and the rise and fall times on this device are much faster. Less than 200pS cycle-to-cycle jitter (-1, -1H,-2, -3, -4, -5H). Available in 16 pin SOIC and TSSOP packages. 3.3V operation. Advanced 0.35µ CMOS technology. Industrial temperature available. The ASM5P2308A-2 allows the user to obtain 2X and 1X frequencies on each output bank. The exact configuration Functional Description ASM5P2308A is a versatile, 3.3V zero-delay buffer designed to ...




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