GD16585

www.DataSheet4U.com 10 Gbit/s Transmitter MUX with Re-timing GD16585 Preliminary General Description GD16585 is a 9.95328 Gbit/s transmitter chip for use in SDH STM-64 and SONET OC-192 optical communication systems. GD16585 integrates all the main functions of the transmitter, which is clock generation, PLL circuits and multiplexer in a single monolithic IC. Hence only an external loop filter and a VCXO are required. The main functions of GD16585 are shown in the figure below. The clock generation is made on-chip by a low noise and tuneable 10 GHz VCO. The VCO frequency is controlled by the PLL with an external loop filter, allowing the user to control the loop characteristic. The clock synchronisation is controlled by the Phase and Frequency Detector with a 155 MHz or 622 MHz reference clock input. GD16585 multiplexes a 16 bit parallel 622 Mbit/s interface into a serial 9.9553 Gbit/s data stream. The timing between the input data and the on-chip clock system are controlled by a second Phase and Frequency Detector (PFCX). It compares the input data clock with the on-chip load clock. The output of the PFCX is the phase and frequency control of the external VCXO reference clock. The output of the MUX stage is retimed by the 10 GHz clock and the output driver is a Current Mode Logic (CML) output with internal 50 Ω termination resistors. The 16 bit wide parallel input interface is LVDS compatible with a 2 × 50 Ω internal load termination. GD16585 is manufactured in a Silicon Bi...