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CY2SSTU877
10-Output JEDEC-Compliant Zero Delay Buffer
Description
www.DataSheet4U.com PRELIMINARY CY2SSTU877 1.8V, 500-MHz, 10-Output JEDEC-Compliant Zero Delay Buffer Features Operating frequency: 125 MHz to 500 MHz Supports DDRII SDRAM Ten differential outputs from one differential input Spread-Spectrum-compatible Low jitter (cycle-to-cycle): < 40 ps Very low skew: < 40 ps Power management control input ...
Cypress Semiconductor
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CY2SSTU877
10-Output JEDEC-Compliant Zero Delay Buffer
- Cypress Semiconductor
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