N16D1618LPA

www.DataSheet4U.com NanoAmp Solutions, Inc. 670 North McCarthy Blvd. Suite 220, Milpitas, CA 95035 ph: 408-935-7777, FAX: 408-935-7770 www.nanoamp.com N16D1618LPA Advance Information 512K × 16 Bits × 2 Banks Low Power Synchronous DRAM DESCRIPTION These N16D1618LPA are low power 16,777,216 bits CMOS Synchronous DRAM organized as 2 banks of 524,288 words x 16 bits. These products are offering fully synchronous operation and are referenced to a positive edge of the clock. All inputs and outputs are synchronized with the rising edge of the clock input. The data paths are internally pipelined to achieve very high bandwidth. All input and output voltage levels are compatible with LVTTL. Features JEDEC standard 1.8V power supply. Auto refresh and self refresh. All pins are compatible with LVTTL interface. 4K refresh cycle / 64ms. Programmable Burst Length and Burst Type. - 1, 2, 4, 8 or Full Page for Sequential Burst. - 4 or 8 for Interleave Burst. Programmable CAS Latency : 2,3 clocks. Programmable Driver Strength Control. - Full Strength or 1/2, 1/4 of Full Strength Deep Power Down Mode All inputs and outputs referenced to the positive edge of the system clock. Data mask function by DQM. Internal dual banks operation. Burst Read Single Write operation. Special Function Support. -PASR (Partial Array Self Refresh) -Auto TCSR(Temperature Compensated Self Refresh) Automatic precharge, includes CONCURRENT Auto Precharge Mode and controlled Precharge Tab...