Z9960

www.DataSheet4U.com Z9960 2.5V/3.3V, 200 MHz Multi-Output Zero Delay Buffer Features 2.5V or 3.3V operation Output frequency up to 200 MHz Supports PowerPC, and Pentium® processors 21 clock outputs: drive up to 42 clock lines LVPECL or LVCMOS/LVTTL clock input Output-to-output skew < 150 ps Split 2.5V/3.3V outputs Spread spectrum compatible Glitch-free output clocks transitioning Output disable control Pin-compatible with MPC9600 Industrial temperature range: –40°C to +85°C 48-pin LQFP package S E L A 0 1 S E L B 0 1 S E L C 0 1 Table 1. Frequency Table[1] F B _ S E L 0 1 QA VCO/2 VCO/4 QB VCO/2 VCO/4 QC VCO/2 VCO/4 FB_OUT VCO/8 VCO/12 Block Diagram AVDD Pin Configuration A PLL 0 1 /2 /4 /8 /12 0 1 DQ 0 1 REF FB 1 2 3 4 5 6 0 1 2 3 4 5 C FB_IN SELA VSS FB_IN QA0 QA1 VDDA QA2 QA3 VSSA QA4 QA5 QA6 VDDA 48 47 46 45 44 43 42 41 40 39 38 37 VSS TCLK PECL_CLK PECL_CLK# VDD REF_SEL FB_SEL AVDD SELA SELB SELC VSSC 1 2 3 4 5 6 7 8 9 10 11 12 36 35 34 33 32 31 30 29 28 27 26 25 VSSA FB_OUT QB0 QB1 VDDB QB2 QB3 VSSB QB4 QB5 QB6 VDDB REF_SEL TCLK PECL_CLK PECL_CLK# 0 0 1 B DQ SELB Z9960 0 1 DQ 6 0 1 2 3 4 5 6 SELC 13 14 15 16 17 18 19 20 21 22 23 24 VDDC OE# QC6 QC5 VSSC QC4 QC3 VDDC QC2 QC1 QC0 VSSB OE# 0 1 FB DQ FB_OUT FB_SEL Note: 1. Input frequency range: 16 MHz to 33 MHz (FB_SEL = 1), or 25 MHz to 50 MHz (FB_SEL = 0). Cypress Semiconductor Corporation Document #: 38-07087 Rev. *C 3901 North First Street San Jose, CA 95...