www.DataSheet4U.com
PRELIMINARY
March 17, 2003
IP2012 / IP2022 Wireless Network Processors
Features and Performance Optimized for Network Connectivity
1.0 Product Highlights
The Ubicom IP2012™ and IP2022™ Wireless Network
Processors combine support for communication physical
layer, Internet protocol stack, device-specific application,
and device-specific peripheral software modules in a
single chip, and are reconfigurable over the Internet. They
can be programmed, and reprogrammed, using pre-built
software modules and configuration tools to create true
single-chip solutions for a wide range of device-to-device
and device-to-human communication applications. High
speed communication interfaces are available via on-chip
hardware Serializer/Deserializer (SerDes) blocks. These
full-duplex blocks allow the IP2022 or IP2012 to be used
in a variety of communication bridging applications. Each
SerDes block is capable of supporting 10Base-T Ethernet
(MAC and PHY), USB, GPSI, SPI, or UART. The high-
speed operating frequency, combined with most
instructions executing in a single cycle, delivers the
throughput needed for emerging network connectivity
applications. A flash-based program memory allows both
in-system and runtime reprogramming. The IP2022 and
IP2012 implement most peripheral, communications and
control functions via software modules (ipModule™
software), replacing traditional hardware for maximum
system design flexibility. This approach allows rapid,
inexpensive product design and, when needed, quick and
easy reconfiguration to accommodate changes in market
needs or industry standards.
Key Features:
• Designed to support single-chip networked solutions
• Fast processor core
• 64kB Flash program memory
• 16kB SRAM data/program memory
• 4kB SRAM data memory
• Two SerDes communication blocks supporting com-
mon PHYs (Ethernet, USB, UARTs, etc.) and bridging
applications (IP2012 has only one SerDes unit)
• Advanced RISC processors
• IP2022 — 120 and 160 MHz versions
• IP2012 — 120 MHz version
• High speed packet processing
• Instruction set optimized for communication functions
• Supports software implementation of traditional hard-
ware functions
• In-system reprogrammable for highest flexibility
• Run time self-programmable
• Vpp = Vcc supply voltage
Choices for
Communication:
Host Bus
Customer Application
HTTP/SMTP/TFTP
TCP/UDP
IP/ICMP
Network Access Layer
PHY Firmware
IP2022/IP2012
ipOS Operating System
8/16-Bit Internet 64-Kbyte 16-Kbyte 4-Kbyte External General
Parallel Processor Flash Inst./Data Data Memory Purpose
Slave Port CPU Memory RAM
RAM Interface I/O Ports
10Base-T Ethernet
(MAC/PHY on chip)
USB 1.1 (SIE on chip)
GPSI
SPI
UART/Modem
Bluetooth HCI
High-Speed
Serial Unit 1
(SERDES)
5
Timers
PLL
Clock
Multiplier
8-Input
10-Bit
A/DC
ISP/ISD
Interface
High-Speed
Serial Unit 2
(SERDES)
Not available on IP2012
515-063b.eps
Choices for
Communication:
ISA (802.11b)
Mini-PCI/Cardbus
(802.11g/802.11a)
I2C
General-Purpose I/O
10Base-T Ethernet
(MAC/PHY on chip)
USB 1.1 (SIE on chip)
GPSI
SPI
UART/Modem
Bluetooth HCI
www.ubicom.com
Figure 1-1 IP2012 / IP2022 Block Diagram
© 2001-2003 Ubicom, Inc. All rights reserved.
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