Document
MC1455, MC1455B, NCV1455B
Timers
The MC1455 monolithic timing circuit is a highly stable controller capable of producing accurate time delays or oscillation. Additional terminals are provided for triggering or resetting if desired. In the time delay mode, time is precisely controlled by one external resistor and capacitor. For astable operation as an oscillator, the free−running frequency and the duty cycle are both accurately controlled with two external resistors and one capacitor. The circuit may be triggered and reset on falling waveforms, and the output structure can source or sink up to 200 mA or drive TTL circuits.
Features
• Direct Replacement for NE555 Timers • Timing from Microseconds through Hours • Operates in Both Astable and Monostable Modes • Adjustable Duty Cycle • High Current Output Can Source or Sink 200 mA • Output Can Drive TTL • Temperature Stability of 0.005% per °C • Normally ON or Normally OFF Output • Pb−Free Packages are Available
117 Vac/60 Hz
10 k 0.1 mF
5 0.01 mF
1.0 k
38 4 6R 2 MC1455 7
1 1.0 mF
MT2 20 M G
C -10 V
Load MT1
1N4003
http://onsemi.com
MARKING DIAGRAMS
8 1
SOIC−8 D SUFFIX CASE 751
8 1455x ALYW G
1
8 1
PDIP−8 P1 SUFFIX CASE 626
8
MC1455yyy AWL
YYWWG
1
x = B or V yyy = BP1 or P1 A = Assembly Location L = Wafer Lot Y, YY = Year W, WW = Work Week
G or G = Pb−Free Package
ORDERING INFORMATION
See detailed ordering and shipping information in the package dimensions section on page 9 of this data sheet.
t = 1.1; R and C = 22 sec Time delay (t) is variable by changing R and C (see Figure 16).
1N4740
3.5 k
10
mF
250 V +
VR ICC VCC
Figure 1. 22 Second Solid State Time Delay Relay Circuit
VCC 8
5k 6 Threshold
5 Control Voltage
5k
Trigger
2 5k
+ Comp -A
+ Comp -B
1 GND
Flip R Flop
Q S Inhibit/
Reset
4 Reset
7 Discharge
3 Output
+ 0.01 mF
VO
Reset 5
Control Voltage
3
Output
ISink ISource
48 VCC 7
700
Discharge
MC1455
Threshold
6 Ith GND Trigger
12
2.0 k
VS
Test circuit for measuring DC parameters (to set output and measure parameters): a) When VS w 2/3 VCC, VO is low. b) When VS v 1/3 VCC, VO is high. c) When VO is low, Pin 7 sinks current. To test for Reset, set VO c) high, apply Reset voltage, and test for current flowing into Pin 7. c) When Reset is not in use, it should be tied to VCC.
Figure 2. Representative Block Diagram
Figure 3. General Test Circuit
© Semiconductor Components Industries, LLC, 2009
December, 2009 − Rev. 10
1
Publication Order Number: MC1455/D
MC1455, MC1455B, NCV1455B
MAXIMUM RATINGS (TA = +25°C, unless otherwise noted.)
Rating
Symbol
Value
Unit
Power Supply Voltage Discharge Current (Pin 7) Power Dissipation (Package Limitation)
P1 Suffix, Plastic Package Derate above TA = +25°C
D Suffix, Plastic Package Derate above TA = +25°C
Operating Temperature Range (Ambient) MC1455B MC1455 NCV1455B
VCC +18 Vdc I7 200 mA
PD 625 mW 5.0 mW/°C
PD 625 mW 160 °C/W
TA °C −40 to +85 0 to +70 −40 to +125
Maximum Operating Die Junction Temperature
TJ
+.